Philips Semiconductors
Octal D-type flip-flop with 3-state outputs
Product specification
HEF40374B
MSI
Minimum clock
pulse width; LOW
Maximum clock
pulse frequency
VDD
V
SYMBOL MIN. TYP.
MAX.
5
50 25
ns
10 tWCPL
25 12
ns
15
20 10
ns
5
25
5
MHz
10 fmax
15
6 12
8 17
MHz
MHz
TYPICAL EXTRAPOLATION
FORMULA
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns
Dynamic power
dissipation per
package (P)
VDD
V
TYPICAL FORMULA FOR P (µW)
5
3 775 fi + ∑ (foCL) × VDD2
10
15 700 fi + ∑ (foCL) × VDD2
15
40 575 fi + ∑ (foCL) × VDD2
where
fi = input freq. (MHz)
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
tTLH
− − − − tTHL
Fig.6 Output transition times as a function of the load capacitance. .
January 1995
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