HT82V46
A.C. Characteristics
AVDD=DVDD=3.3V, AVSS=DVSS=0V, Ta=25°C, 3-channel mode, ADCK=45MHz unless otherwise stated.
Symbol
Parameter
Test Conditions Min.
Typ.
Max.
Unit
Overall system specification (including 16-bit ADC, PGA, Offset and CDS functions)
Maximum Conversion Rate
―
―
45
―
MSPS
Full-scale Input Voltage Range
(See Note 1)
LOWREF= 0,
GMAX=7.5 typ.
LOWREF= 0,
GMIN=0.65 typ.
0.25
VP-P
―
―
3.03
VP-P
Full-scale Input Voltage Range
(See Note 1)
LOWREF= 0,
GMAX=7.5 typ.
LOWREF= 0,
GMIN=0.65 typ.
0.15
VP-P
―
―
1.82
VP-P
VIN
Input Signal Limits (See Note 2)
―
AVSS-0.3
―
AVDD+0.3
V
Full-scale Transition Error
Gain=0dB;
PGA[8:0]=1A(hex)
―
30
―
mV
Zero-scale Transition Error
Gain=0dB;
PGA[8:0]=1A(hex)
―
30
―
mV
DNL
Differential Non-linearity
―
―
2
―
LSB
INL
Integral Non-linearity
―
―
50
―
LSB
Channel to Channel Gain Matching
―
―
1.5
―
%
Total Output Noise
Min Gain
Max Gain
30
LSB rms
―
―
300
LSB rms
References
LOWREF=0
VRT
Upper Reference Voltage
LOWREF=1
2.05
V
1.95
2.25
1.85
V
LOWREF=0
VRB
Lower Reference Voltage
LOWREF=1
1.05
V
0.95
1.25
1.25
V
CML
Input Return Bias Voltage
―
―
1.5
―
V
VRTB
Diff. Reference Voltage
(VRT - VRB)
LOWREF=0
LOWREF=1
1.0
V
0.90
1.10
0.6
V
RLC DAC (Reset-Level Clamp D/A Converter)
Resolution
―
―
4
―
bits
VCSTEP
Step Size
CDACRNG=0
CDACRNG=1
0.173
V/step
―
―
0.110
V/step
VCBOT
Output Voltage at Code 0h
CDACRNG=0
CDACRNG=1
0.4
V
―
―
0.4
V
VCTOP
Output Voltage at Code Fh
CDACRNG=0
CDACRNG=1
3.00
V
―
―
2.05
V
DNL
Differential Non-linearity
―
-0.5
―
+0.5
LSB
INL
Integral Non-linearity
―
―
+/-1
―
LSB
Offset DAC
Resolution
―
―
8
―
bits
Step Size
―
―
2.04
―
mV/step
Output Voltage
Code 00(hex)
Code FF(hex)
-260
mV
―
―
+260
mV
Rev. 1.10
4
November 24, 2011