IDT723626/723636/723646 CMOS TRIPLE BUS SyncFIFO™
WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 and 1,024 x 36 x 2
COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY
VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, CL = 30pF
(Commercial: VCC = 5.0V ±10%, TA = 0°C to +70°C)
Symbol
Parameter
Commercial
IDT723626L15
IDT723636L15
IDT723646L15
Min.
Max.
Unit
tA
Access Time, CLKA↑ to A0-A35 and CLKB↑ to B0-B17
2
10
ns
tWFF Propagation Delay Time, CLKA↑ to FFA/IRA and CLKC↑ to FFC/IRC
2
8
ns
tREF Propagation Delay Time, CLKA↑ to EFA/ORA and CLKB↑ to EFB/ORB
1
8
ns
tPAE Propagation Delay Time, CLKA↑ to AEA and CLKB↑ to AEB
1
8
ns
tPAF Propagation Delay Time, CLKA↑ to AFA and CLKC↑ to AFC
1
8
ns
tPMF Propagation Delay Time, CLKA↑ to MBF1 LOW or MBF2 HIGH, CLKB↑ to MBF1
0
HIGH, and CLKC↑ to MBF2 LOW
8
ns
tPMR Propagation Delay Time, CLKA↑ to B0-B17(1) and CLKC↑ to A0-A35(2)
2
10
ns
tMDV Propagation Delay Time, MBA to A0-A35 valid and MBB to B0-B17 valid
2
10
ns
tRSF Propagation Delay Time, MRS1 or PRS1 LOW to AEB LOW, AFA HIGH, and
1
MBF1 HIGH and MRS2 or PRS2 LOW to AEA LOW, AFC HIGH, and MBF2 HIGH
15
ns
tEN
Enable Time, CSA or W/RA LOW to A0-A35 Active and CSB LOW to B0-B17 Active
2
10
ns
tDIS
Disable Time, CSA or W/RA HIGH to A0-A35 at HIGH impedance and CSB HIGH
1
to B0-B17 at HIGH impedance
8
ns
NOTES:
1. Writing data to the mail1 register when the B0-B17 outputs are active and MBB is HIGH.
2. Writing data to the mail2 register when the A0-A35 outputs are active and MBA is HIGH.
9