IRF6631
+
-
RG
D.U.T
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
- +
• di/dt controlled by RG
• Driver same type as D.U.T.
VDD
+
• ISD controlled by Duty Factor "D"
-
• D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
IInndduuccttoorr CCuurrernetnt
Forward Drop
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
* VGS=10V
VDD
ISD
DirectFET Substrate and PCB Layout, SQ Outline
(Small Size Can, Q-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes
all recommendations for stencil and substrate designs.
www.irf.com
D
GS
D
G = GATE
D = DRAIN
S = SOURCE
D
D
7