IS42S16800A-7TI View Datasheet(PDF) - Integrated Silicon Solution

Part Name

Description

Manufacturer

IS42S16800A-7TI

16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM

Integrated Silicon Solution 

IS42S81600A, IS42S16800A, IS42S32400A

ISSI ®

DC ELECTRICAL CHARACTERISTICS (Recommended Operation Conditions unless otherwise noted.)

Symbol Parameter

Test Condition

Speed Min. Max. Unit

IIL

Input Leakage Current

0V ≤ VIN ≤ VCC, with pins other than

the tested pin at 0V

–5

5

µA

IOL

Output Leakage Current

Output is disabled, 0V ≤ VOUT ≤ VCC

–5

5

µA

VOH

Output High Voltage Level

IOUT = –2 mA

2.4

—

V

VOL

Output Low Voltage Level

IOUT = +2 mA

— 0.4

V

IDD1

Operating Current(1,2)

IDD2P

IDD2PS

IDD2N

IDD2NS

IDD3P

IDD3PS

Precharge Standby Current

(In Power-Down Mode)

Precharge Standby Current

(In Non Power-Down Mode)

Active Standby Current

(In Power-Down Mode)

One Bank Operation,

Burst Length=1

tRC ≥ tRC (min.)

IOUT = 0mA

CKE ≤ VIL (MAX)

CKE ≥ VIH (MIN)

CKE ≤ VIL (MAX)

Com. -6

Com. -7

Ind. -7

Com. -10

Ind. -10

tCK = tCK (MIN)

—

tCK = ∞

—

tCK = tCK (MIN)

—

tCK = ∞

—

tCK = tCK (MIN)

—

tCK = ∞

—

— 170 mA

— 160 mA

— 170 mA

— 140 mA

— 150 mA

—

3

mA

—

2

mA

— 25 mA

— 15 mA

— 10 mA

— 10 mA

IDD3N Active Standby Current

IDD3NS (InNonPower-DownMode)

CKE ≥ VIH (MIN)

tCK = tCK (MIN) Com. —

—

35 mA

Ind. —

—

45 mA

tCK = ∞

Com. —

—

30 mA

Ind. —

—

35 mA

Com. -6

— 165 mA

IDD4

Operating Current

(In Burst Mode)(1)

tCK = tCK (MIN)

IOUT = 0mA

Com. -7

Ind. -7

Com. -10

Ind. -10

— 150 mA

— 160 mA

— 140 mA

— 150 mA

Com. -6

— 330 mA

IDD5

Auto-Refresh Current

tRC = tRC (MIN)

Com. -7

Ind. -7

Com. -10

Ind. -10

— 300 mA

— 330 mA

— 270 mA

— 300 mA

IDD6

Self-Refresh Current

CKE ≤ 0.2V

Com. —

—

2

mA

Ind. —

—

3

mA

Notes:

1. These are the values at the minimum cycle time. Since the currents are transient, these values decrease as the cycle time

increases. Also note that a bypass capacitor of at least 0.01 µF should be inserted between VDD and Vss for each memory

chip to suppress power supply voltage noise (voltage drops) due to these transient currents.

2. IDD1 and IDD4 depend on the output load. The maximum values for Icc1 and Icc4 are obtained with the output open state.

16

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

PRELIMINARY INFORMATION Rev. 00C

01/20/05

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