Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
DATA
data
command
data
WR_N
Tcy(RD-WC)
RD_N
(1)
CS_N
(1) Example: read data.
Fig 18. Read data + write command cycle timing.
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18.3 DMA timing: single-cycle mode
Table 57: Dynamic characteristics: single-cycle DMA timing
VBUS = VREG(3V3) = 2.7 V to 3.9 V; VDD(I/O) = 1.8 V
Symbol
Parameter
Conditions
Min
8237 compatible mode (see Figure 19)
tASRP
DREQ off after DACK on
-
Tcy(DREQ)
cycle time signal DREQ
90
Read in DACK-only mode (see Figure 20)
tASRP
DREQ off after DACK on
-
tASAP
DACK pulse width
25
tASAP + tAPRS DREQ on after DACK off
90
tASDV
data valid after DACK on
-
tAPDZ
data hold after DACK off
-
Write in DACK-only mode (see Figure 21)
tASRP
DREQ off after DACK on
-
tASAP + tAPRS DREQ on after DACK off
90
tDVAP
data setup before DACK off
5
tAPDZ
data hold after DACK off
3
Max Unit
40
ns
-
ns
40
ns
-
ns
-
ns
22
ns
3
ns
40
ns
-
ns
-
ns
-
ns
DREQ
T cy(DREQ)
t ASRP
DACK_N
Fig 19. DMA timing in 8237 compatible mode.
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9397 750 11804
Product data
Rev. 01 — 24 February 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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