SAA2003H View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

SAA2003H

Stereo filter and codec

Philips Electronics 

Philips Semiconductors

Stereo filter and codec

Preliminary specification

SAA2003

Table 6 Extended settings register.

A3 A2 A1 A0 D3 D2 D1 D0

MODE

0

0

1

0

X

X

X

0 16 bit operation; 16 bit rounding

0

0

1

0

X

X

X

1 18 bit operation; 18 bit rounding

0

0

1

0

X

X

0

X I2S data format

0

0

1

0

X

X

1

X EIAJ data format

0

0

1

0

X

0

X

X peak detector input SD1

0

0

1

0

X

1

X

X peak detector input SD2

0

0

1

0

0

X

X

X SD1/FS256 transparent mode disabled

0

0

1

0

1

X

X

X SD1/FS256 transparent mode enabled

Filtered data interface

The filtered data interface transfers the sub-band filtered data between the stereo filter codec and adaptive allocation and

scaling parts of the DCC chip-set, and consists of the signals as shown in Table 7.

Table 7 Filtered data interface signals.

PIN

FDCL

FDWS

FDAO

FDAI

FDIR

FSYNC

INPUT/OUTPUT

output

output

output

input

output

output

FUNCTION

filtered data bit clock

filtered data word select

filtered data serial output

filtered data serial input

decode/encode control

filtered data sync signal; band zero

FREQUENCY

64fs

fs

−

−

−

−

FILTERED DATA INTERFACE FORMAT

The filtered data is transferred over the interface in accordance with the formats illustrated in Figs 10 and 11.

channel

handbook, full pagewidth

FDWS

left 32 bits

right

FDCL

FDAI/

FDAO

bit :

1

2 2 22

3 2 10

MSB

000

210

LSB

7 bits

22 2 2

32 1 0

MSB

MLB765

Fig.10 Transfer of filtered data; SAA2003/SAA2013.

May 1994

14

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