Philips Semiconductors
Stereo filter and codec
Preliminary specification
SAA2003
SBWS
32 bits
SBCL
SBDA
bit :
SBEF
1
15 bits 1
0 00 0
0 12 3
MSB
1 1 11 1 1
0 1 23 4 5
LSB
byte 0
byte 1
1 11 1 22 2
6 78 9 01 2
MSB
byte 2
MEA649 - 2
Fig.11 Transfer of sub-band PASC data.
Sub-band serial PASC interface
The sub-band serial interface carries the PASC serial data stream between the stereo filter codec and the drive processor
part of the DCC chip-set, and consists of the signals as shown in Table 8.
Table 8 Sub-band serial PASC interface signals.
PIN
SBDIR
SBDA
1SBCL
SBWS
SBEF
URDA
INPUT/OUTPUT
input
input/output
input/output
input/output
input
input
FUNCTION
sub-band data direction control
sub-band serial data
sub-band bit clock
sub-band word select
sub-band data error flag
unreliable data flag
FREQUENCY
−
−
768 kHz
12 kHz
−
−
The SAA2003 generates SBWS and SBCL in both decode and encoding modes. In decode both signals can be set to
inputs (slave mode) by bit 0 of the extended settings register. The filtered data interface timing is always derived from
the 24.576 MHz clock, regardless of the audio sampling frequency.
Table 9 Extended settings register.
A3 A2 A1 A0 D3 D2 D1 D0
MODE
0
0
0
1
X
X
X
0 slave mode (default)
0
0
0
1
X
X
X
1 master mode
Stereo and 2-channel mono encoding modes are available. Stereo, joint stereo and 2-channel mono decoding modes
are available. In decoding and encoding, 48 kHz, 44.1 kHz and 32 kHz sample frequencies can be used.
May 1994
15