LM3S608-IQC20-B0 View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

LM3S608-IQC20-B0

LM3S608 Microcontroller

Unspecified 

LM3S608 Microcontroller

Exception Type

Position Prioritya Description

Debug Monitor

12

settable Debug monitor (when not halting). This is synchronous, but only active

when enabled. It does not activate if lower priority than the current

activation.

-

13

-

Reserved.

PendSV

14

settable Pendable request for system service. This is asynchronous and only

pended by software.

SysTick

15

settable System tick timer has fired. This is asynchronous.

Interrupts

16 and

above

settable Asserted from outside the ARM Cortex-M3 core and fed through the NVIC

(prioritized). These are all asynchronous. Table 4-2 on page 39 lists the

interrupts on the LM3S608 controller.

a. 0 is the default priority for all the settable priorities.

Table 4-2. Interrupts

Interrupt (Bit in Interrupt Registers) Description

0

GPIO Port A

1

GPIO Port B

2

GPIO Port C

3

GPIO Port D

4

GPIO Port E

5

UART0

6

UART1

7

SSI0

8

I2C0

14

ADC Sequence 0

15

ADC Sequence 1

16

ADC Sequence 2

17

ADC Sequence 3

18

Watchdog timer

19

Timer0 A

20

Timer0 B

21

Timer1 A

22

Timer1 B

23

Timer2 A

24

Timer2 B

25

Analog Comparator 0

28

System Control

29

Flash Control

30-31

Reserved

October 01, 2007

39

Preliminary

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