LTC1872BES6 View Datasheet(PDF) - Linear Technology
Part Name
Description
Manufacturer
LTC1872BES6 Datasheet PDF : 12 Pages
| |||
LTC1872B
W
FUNCTIONAL DIAGRA
VIN SENSE–
5
4
15mV
+
ICMP
–
SLOPE
OSC
COMP
RS
R
Q
SWITCHING
LOGIC AND
BLANKING
S
CIRCUIT
VIN
NGATE
6
FREQ
FOLDBACK
0.3V
OVP
VREF
+
60mV
0.5µA
VIN
1 ITH/RUN
EAMP
VREF
0.8V
VFB
3
VIN
0.35V +
VOLTAGE
VREF
REFERENCE
0.8V
SHDN
CMP
SHDN
GND
–
UV
2
UNDERVOLTAGE
LOCKOUT
1.2V
1872B FD
U
OPERATIO (Refer to Functional Diagram)
Main Control Loop
The LTC1872B is a constant frequency current mode
switching regulator. During normal operation, the external
N-channel power MOSFET is turned on each cycle by the
oscillator and turned off when the current comparator
(ICMP) resets the RS latch. The peak inductor current at
which ICMP resets the RS latch is controlled by the voltage
on the ITH/RUN pin, which is the output of the error
amplifier EAMP. An external resistive divider connected
between VOUT and ground allows the EAMP to receive an
output feedback voltage VFB. When the load current in-
creases, it causes a slight decrease in VFB relative to the
0.8V reference, which in turn causes the
ITH/RUN voltage to increase until the average inductor
current matches the new load current.
The main control loop is shut down by pulling the ITH/RUN
pin low. Releasing ITH/RUN allows an internal 0.5µA
current source to charge up the external compensation
network. When the ITH/RUN pin reaches 0.35V, the main
control loop is enabled with the ITH/RUN voltage then
pulled up to its zero current level of approximately 0.7V.
As the external compensation network continues to charge
up, the corresponding output current trip level follows,
allowing normal operation.
Comparator OVP guards against transient overshoots
> 7.5% by turning off the external N-channel power
MOSFET and keeping it off until the fault is removed.
Low Load Current Operation
Under very light load current conditions, the ITH/RUN pin
voltage will be very close to the zero current level of 0.85V.
As the load current decreases further, an internal offset at
the current comparator input will assure that the current
comparator remains tripped (even at zero load current)
and the regulator will start to skip cycles, as it must, in
order to maintain regulation. This behavior allows the
regulator to maintain constant frequency down to very
light loads, resulting in less low frequency noise genera-
tion over a wide load current range.
4
Share Link: 