TC530 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

TC530

5V Precision Data Acquisition Subsystems

Microchip Technology 

4.0 DETAILED DESCRIPTION

4.1 Dual Slope Integrating Converter

The TC530/TC534 dual slope converter operates by

integrating the input signal for a fixed time period, then

applying an opposite polarity reference voltage while

timing the period (counting clocks pulses) for the

integrator output to cross 0V (deintegrating). The

resulting count is read as conversion data.

A simple mathematical expression that describes dual

slope conversion is:

EQUATION 4-1:

Integrate Voltage = De-integrate Voltage

EQUATION 4-2:

∫ ∫ -----------1------------

RINTCINT

TINT VIN(T)dT

0

= -----------1------------

RINTCINT

TDEINT VREF

0

from which:

EQUATION 4-3:

[ ] [ ] (VIN)

(TINT)

(RINT)(CINT)

= (VREF)

(TDEINT)

(RINT)(CINT)

And therefore:

EQUATION 4-4:

Where:

[ ] VIN

=

VREF

TDEINT

TINT

VREF = Reference Voltage

TINT = Integrate Time

TDEINT = Reference Voltage De-integrate

Time

Inspection of Equation 4-4 shows dual slope converter

accuracy is unrelated to integrating resistor and

capacitor values, as long as they are stable throughout

the measurement cycle. This measurement technique

is inherently ratiometric (i.e., the ratio between the TINT

and TDEINT times is equal to the ratio between VIN and

VREF).

Another inherent benefit is noise immunity. Input noise

spikes are integrated, or averaged to zero, during the

integration period. The integrating converter has a noise

immunity with an attenuation rate of at least -20 dB per

decade. Interference signals with frequencies at integral

multiples of the integration period are, for the most part,

completely removed. For this reason, the integration

TC530/TC534

period of the converter is often established to reject

50/60 Hz line noise. The ability to reject such noise is

shown by the plot of Figure 4-1.

In addition to the two phases required for dual slope

measurement (Integrate and De-integrate), the

TC530/TC534 performs two additional adjustments to

minimize measurement error due to system offset volt-

ages. The resulting four internal operations (conver-

sion phases) performed each measurement cycle are:

Auto Zero (AZ), Integrator Output Zero (IZ), Input

Integrate (INT) and Reference De-integrate (DINT).

The AZ and IZ phases compensate for system offset

errors and the INT and DINT phases perform the actual

A/D conversion.

30

T = Measurement

Period

20

10

0

0.1/T

1/T

Input Frequency

10/T

FIGURE 4-1:

Integrating Converter

Normal Mode Rejection.

4.2 Auto Zero Phase (AZ)

This phase compensates for errors due to buffer,

integrator and comparator offset voltages. During this

phase, an internal feedback loop forces a

compensating error voltage on auto zero capacitor

(CAZ). The duration of the AZ phase is programmable

via the serial port (see Section 5.1.1 “AZ and INT

Phase Duration”, AZ and INT Phase Duration).

© 2007 Microchip Technology Inc.

DS21433C-page 9

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