MAX3376EETA-T View Datasheet(PDF) - Maxim Integrated

Part Name

Description

Manufacturer

MAX3376EETA-T

±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP

Maxim Integrated 

±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad

Low-Voltage Level Translators in UCSP

Three-State Output Mode

Pull THREE-STATE low to place the MAX3372E–

MAX3379E and MAX3390E–MAX3393E in three-state out-

put mode. Connect THREE-STATE to VL (logic-high) for

normal operation. Activating the three-state output mode

disconnects the internal 10kΩ pullup resistors on the I/O

VCC and I/O VL lines. This forces the I/O lines to a high-

impedance state, and decreases the supply current to

less than 1µA. The high-impedance I/O lines in three-

state output mode allow for use in a multidrop network.

When in three-state output mode, do not allow the voltage

VL

at I/O VL_ to exceed (VL + 0.3V), or the voltage at I/O

VCC_ to exceed (VCC + 0.3V).

Thermal Short-Circuit Protection

Thermal overload detection protects the MAX3372E–

MAX3379E and MAX3390E–MAX3393E from short-circuit

fault conditions. In the event of a short-circuit fault, when

the junction temperature (TJ) reaches +152°C, a thermal

sensor signals the three-state output mode logic to force

the device into three-state output mode. When TJ has

cooled to +142°C, normal operation resumes.

VCC

P

P

GATE

BIAS

I/O VL

N

Figure 2a. Functional Diagram, MAX3372E/MAX3377E (1 I/O line)

VL

I/O VCC

VCC

PU1

ONE-SHOT

BLOCK

ONE-SHOT

BLOCK

PU2

GATE

BIAS

I/O VL_

N

I/O VCC_

Figure 2b. Functional Diagram, MAX3373E/MAX3378E (1 I/O line)

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