MC10E451, MC100E451
D5 D5 D4 D4 D3 D3 VCCO
25 24 23 22 21 20 19
CLK 26
18 Q5
VBB 27
CLK 28
VEE 1
MR 2
NC 3
D0 4
5
MC10E451/MC100E451
6 7 8 9 10
17 Q4
16 VCC
15 Q3
14 VCCO
13 Q2
12 Q1
11
D0 D1 D1 D2 D2 VCCO Q0
* All VCC and VCCO pins are tied together on the die.
Warning: All VCC, VCCO, and VEE pins must be externally con-
nected to Power Supply to guarantee proper operation.
Figure 1. 28−Lean Pinout Assignment (Top View)
D0
D0
D
Q0
R
D1
D1
D
Q1
R
D2
D2
D
Q2
R
D3
D3
D
Q3
R
D4
D4
D
Q4
R
D5
D5
D
Q5
R
CLK
CLK
MR
VBB
Figure 2. Logic Diagram
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D0 − D5, D0 − D5
CLK, CLK
ECL Differential Data Input
ECL Differential Clock Input
MR
ECL Master Reset Input
Q0 − Q5
VBB
VCC, VCCO
VEE
NC
ECL Data Outputs
Reference Voltage Output
Positive Supply
Negative Supply
No Connect
http://onsemi.com
2