MC100H642 View Datasheet(PDF) - ON Semiconductor
Part Name
Description
Manufacturer
MC100H642 Datasheet PDF : 10 Pages
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MC10H642, MC100H642
10/100H642 − DUTY CYCLE CONTROL
To maintain a duty cycle of ±5% at 50 MHz, limit the load capacitance and/or power supply variation as shown in Figures
1 and 2. For a ±2.5% duty cycle limit, see Figures 3 and 4. Figures 5 and 6 show duty cycle variation with temperature.
Figure 7 shows typical TPD versus load. Figure 8 shows reset recovery time. Figure 9 shows output states after power up.
Best duty cycle control is obtained with a single mP load and minimum line length.
11
11
10
4.75
5.00
10
4.75
5.00
5.25
5.25
9
0
10 20 30 40 50 60
CAPACITIVE LOAD (pF)
Figure 3. MC10H642 Positive PW versus Load
@ ±5% VCC, TA = 25°C
10.6
10.4
10.2
10.0
4.875
5.00
9.8
5.125
9.6
9.4
9.2 0
10 20 30 40 50 60
CAPACITIVE LOAD (pF)
Figure 5. MC10H642 Positive PW versus Load
@ ±2.5% VCC, TA = 25°C
10.4
10.2
10.0
0 pF
9.8
25 pF
50 pF
9.6
9.4
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 7. MC10H642 Positive PW versus Temperature,
VCC = 5.0 V
9
0
10
20
30 40 50
60
CAPACITIVE LOAD (pF)
Figure 4. MC10H642 Negative PW versus Load
@ ±5% VCC, TA = 25°C
10.8
10.6
10.4
10.2
4.875
5.00
10.0
5.125
9.8
9.6
9.4
0
10 CAPAC2I0TIVE LO3A0D (pF) 40
50
60
Figure 6. MC10H642 Negative PW versus Load
@ ±2.5% VCC, TA = 25°C
10.5
10.3
10.1
0 pF
9.9
25 pF
50 pF
9.7
9.5
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 8. MC10H642 Negative PW versus
Temperature, VCC = 5.0 V
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