ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 6. Static Electrical Characteristics (continued)
Characteristics noted under conditions 4.5 V ≤ VDD ≤ 5.5 V, 9.0 V ≤ VPWR ≤ 16 V, -40°C ≤ TA ≤ 125°C, unless otherwise noted.
Typical values noted reflect the approximate value with VPWR = 13 V, TA = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
Over Temperature Shutdown (Outputs OFF) (22)
Over Temperature Shutdown Hysteresis (22)
TLIM
155
170
185
°C
TLIM(HYS)
—
10
20
°C
DIGITAL INTERFACE
Input Logic High Voltage (23)
Input Logic Low Voltage (24)
Input Logic Voltage Hysteresis (25)
Input Logic Current (26)
RST Pull-Up Current (RST = 0.7 VDD)
SFPD Pull-Down Current (SFPD = 0.2 VDD)
SO High State Output Voltage (IOH = 1.0 mA)
SO Low State Output Voltage (IOL = -1.6 mA)
SO Tri-State Leakage Current (CS = 0.7 VDD, 0 V < VSO < VDD)
Input Capacitance (0 V < VDD < 5.5 V) (27)
SO Tri-State Capacitance (0 V < VDD < 5.5 V) (28)
VIH
0.7
—
1.0
VDD
VIL
0
—
0.2
VDD
VI(HYS)
50
100
500
mV
IIN
-10
0
10
µA
IRST
10
22
50
µA
ISFPD
10
22
50
µA
VSOH
VDD -1.0 V VDD -0.6 V
—
V
VSOL
—
0.2
0.4
V
ISOT
-10
0
10
µA
CIN
—
—
12
pF
CSOT
—
—
20
pF
Notes
22. This parameter is guaranteed by design, but it is not production tested.
23. Upper and lower logic threshold voltage levels apply to SI, CS, SCLK, RST, and SFPD inputs.
24. Lower logic threshold voltage range applies to SI, CS, SCLK, Reset, and SFPD input signals.
25. Only the SFPD and Reset inputs have hysteresis. This parameter is guaranteed by design, but it is not production tested.
26. Input current of SCLK, SI and CS logic control inputs.
27. Input capacitance of SI, CS, SCLK, RST, and SFPD for 0 V < VDD < 5.5 V. This parameter is guaranteed by design, but it is not
production tested.
28. Tri-state capacitance of SO for 0 V < VDD < 5.5 V. This parameter is guaranteed by design, but it is not production tested.
33298
8
Analog Integrated Circuit Device Data
Freescale Semiconductor