MCM67Q709AZP10 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

MCM67Q709AZP10

128K x 9 Bit Separate I/O Synchronous Fast Static RAM

Motorola => Freescale 

BLOCK DIAGRAM

A0 – A16

SH

BSR

D0 – D8

SH

BSR

E

SH

BSR

MEMORY

REG

DECODERS

ARRAY

128K x 9 ARRAY

SH

BSR

REG

SENSE AMPS

AND WRITE

DRIVERS

MUX

2:1

OUTPUT

REGISTER

WRITE PULSE

REG

GENERATOR

G

REG

SH

BSR

W

REG

SH

BSR

K

SH

BSR

* I SDI

LM LS

BYPASS

SE

1

∧L

0

SDO O *

* I SE

SCK

SCK SCK

* I SCK

NOTES:

1. Bypass mode is entered with SE low and SCK cycled.

2. SH BSR = Shadow Bypass Scan Register.

3. 39 bumps used in Boundary Scan. VSS, VCC, NC, SDI, SDO, SE, and SCK not used in Scan Path.

4. SDO Output Sequence A6, A4, A2, A0, D8, Q8, D6, Q6, D4, Q4, D2, Q2, D0, Q0, A1, A3, A5, A7, A8, A9, A10, A11,

A12, A13, Q1, D1, Q3, D3, Q5, D5, Q7, D7, A15, A16, A14, E, G, W, K.

* Four added test pins.

Q0 – Q8

MCM67Q709A

2

MOTOROLA FAST SRAM

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