MX25L1635D
REVISION HISTORY
Revision No. Description
Page
Date
1.0
1. Removed "Advanced Information" on page 1
P1
FEB/27/2008
1.1
1. Corrected wording
P10,18,19 APR/18/2008
2. Added the description of SRWD bit for factory default
P16
1.2
1. Correct typo
P13,19,20 APR/24/2008
1.3
1. Changed tSHSL spec from 30/50ns to 15/50ns
P29
JUL/08/2008
2. Modified the performance enhance mode reset function description P19,35
3. Added 8-SOP 104MHz solution
P5,27,28,29,
P43,44
4. Changed tCH/tCL spec from 5.5/5.5 (ns) to 5/5 (ns)
P29
1.4
1. tCH(1), tCL(1) change from 5ns to 4.8ns
P29
AUG/06/2008
2. Added "Release Read Enhance mode" in cmd set table
P14
3. Rewrite 4xI/O Read performance enhance mode process flow
P19
description
4. Modified figure 2 & 3 waveform
P26
1.5
1. Revised sector erase time spec from 90ms(typ.) to 60ms(typ.)
P5,42
OCT/01/2008
2. Revised sector erase time spec from 120ms(max.) to 300ms(max.) P29
3. Revised block erase time spec from 1s(typ.) to 0.7s(typ.)
P29
P/N: PM1374
REV. 1.5, OCT. 01, 2008
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