OP270E(RevA) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

OP270E
(Rev.:RevA)

Dual Very Low Noise Precision Operational Amplifier

Analog Devices 

0

–1

SINGLE OP AMP.

CONVENTIONAL DESIGN

–2

–3

CASCADED

(TWO STAGES)

–4

–5

LOW PHASE ERROR

AMPLIFIER

–6

–7

0.001

0.01

0.005

0.1

0.05

FREQUENCY RATIO – (1/␤␻)(␻/␻T)

1.0

0.5

Figure 13. Phase Error Comparison

C1

0.47␮F

VIN

R1

47k⍀

+

1/2

OP270E

R2

3.3k⍀

–

R3

680⍀

C2

6.8␮F

+

L1

TANTALUM 1H

R5

680⍀

C3

1␮F

+

TANTALUM

L2

600mH

R7

680⍀

C4

0.22␮F

L3

180mH

R9

680⍀

C5

0.047␮F

L4

60mH

R11

680⍀

C6

0.022␮F

L5

10mH

R4

1k⍀

60Hz

R6

1k⍀

200Hz

R8

1k⍀

800Hz

R10

1k⍀

3kHz

R12

1k⍀

10kHz

+

1/2

OP270E

–

R13

3.3k⍀

R14

100⍀

VOUT

Figure 14. 5-Band Low Noise Graphic Equalizer

OP270

FIVE-BAND LOW NOISE STEREO GRAPHIC EQUALIZER

The graphic equalizer circuit shown in Figure 14 provides 15dB of

boost or cut over a 5-band range. Signal-to-noise ratio over a 20 kHz

bandwidth is better than 100 dB referred to a 3 Vrms input. Larger

inductors can be replaced by active inductors but this reduces

the signal-to-noise ratio.

DIGITAL PANNING CONTROL

Figure 15 uses a DAC-8221, a dual 12-bit CMOS DAC, to pan

a signal between two channels. One channel is formed by the

current output of DAC A driving one-half of an OP270 in a

current-to-voltage converter configuration. The other channel is

formed by the complementary output current of DAC A which

normally flows to ground though the AGND pin. This comple-

mentary current is converted to a voltage by the other half of the

OP-270 which also holds AGND at virtual ground.

Gain error due to mismatching between the internal DAC lad-

der resistors and the current-to voltage feedback resistors is

eliminated by using feedback resistors internal to the DAC8221.

Only DAC A passes a signal; DAC B provides the second feed-

back resistor. With VREFB unconnected, the current-to-voltage

converter, using RFBB, is accurate and not influenced by digital

data reaching DAC B. Distortion of the digital panning control

is less than 0.002% over the 20 Hz–20 kHz audio range. Figure

16 shows the complementary outputs for a 1 kHz input signal

and a digital ramp applied to the DAC data input.

DUAL PROGRAMMABLE GAIN AMPLIFIER

The dual OP270 and the DAC-8221, a dual 12-bit CMOS

DAC, can be combined to form a space-saving dual program-

mable amplifier. The digital code present at the DAC, which is

easily set by a microprocessor, determines the ratio between the

internal feedback resistor and the resistance the DAC ladder

presents to the op amp feedback loop. Gain of each amplifier is:

VOUT

VIN

4096

=n

where n equals the decimal equivalent of the 12-bit digital code

present at the DAC. If the digital code present at the DAC

consists of all zeros, the feedback loop will open causing the op

amp output to saturate. A 20 MW resistor placed in parallel with

the DAC feedback loop eliminates this problem with only a very

small reduction in gain accuracy.

REV. A

–13–

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