Philips Semiconductors
74LV164
8-bit serial-in/parallel-out shift register
7. Functional description
7.1 Function table
Table 4: Function table [1]
Operating
Input
mode
MR
CP
Reset (clear) L
X
Shift
H
↑
H
↑
H
↑
H
↑
DSA
X
l
l
h
h
DSB
X
l
h
l
h
Output
Q0
L
L
L
L
H
Q1 to Q7
L to L
q0 to q6
q0 to q6
q0 to q6
q0 to q6
[1] H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH clock transition;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
q = lower case letter indicates the state of referenced input one set-up time prior to the LOW-to-HIGH CP
transition.
8. Limiting values
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max Unit
VCC
supply voltage
−0.5 +7.0 V
IIK
input diode current
VI < −0.5 V or VI > VCC + 0.5 V
-
±20 mA
IOK
output diode current
VO < −0.5 V or VO > VCC + 0.5 V
-
±50 mA
IO
output source or sink
VO = −0.5 V to (VCC + 0.5 V)
[1] -
±25 mA
current
ICC,
IGND
Tstg
Ptot
VCC or GND current
storage temperature
total power dissipation
DIP14 package
Tamb = −40 °C to +125 °C
-
±50 mA
−65 +150 °C
[2] -
750 mW
SO14, (T)SSOP14
and DHVQFN14
packages
[3] -
500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] DIP14 package: Ptot derates linearly with 12 mW/K above 70 °C.
[3] SO14 package: Ptot derates linearly with 8 mW/K above 70 °C.
(T)SSOP14 package: Ptot derates linearly with 5.5 mW/K above 60 °C.
DHVQFN14 package: Ptot derates linearly with 4.5 mW/K above 60 °C.
9397 750 14501
Product data sheet
Rev. 03 — 4 February 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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