74LV164 View Datasheet(PDF) - Philips Electronics
Part Name
Description
Manufacturer
74LV164 Datasheet PDF : 12 Pages
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Philips Semiconductors
8-bit serial-in/parallel-out shift register
Product specification
74LV164
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V v 3.6V
VM = 0.5V * VCC at VCC t 2.7V and w 4.5V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI
CP INPUT
GND
VOH
Qn OUTPUT
VOL
1/fmax
VM
tw
tPHL
VM
tPLH
SV00351
Figure 1. The clock (CP) to output (Qn) propagation delays, the
clock pulse width, the output transition times and the
maximum clock pulse frequency
Vl
CP INPUT
VM
GND
ÎÎÎÎ Vl
ÎÎÎÎ Dn INPUT
ÎÎÎÎ GND
tsu
VM
ÎÎÎth ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtsu ÎÎÎthÎÎÎ
VOH
Qn OUTPUT
VM
VOL
SV00353
Figure 3. Data set-up and hold times for the Dn inputs
NOTE:
The shaded areas indicate when the input is permitted to change for
predictable output performance.
TEST CIRCUIT
Vcc
Vi
MR INPUT
GND
Vi
CP INPUT
GND
VOH
Qn OUTPUT
VOL
VM
tw
tPHL
VM
trem
VM
SV00352
Figure 2. The master reset (MR) pulse width, the master reset to
output (Qn) propagation delay and the master reset to clock
(CP) removal time
PULSE
GENERATOR
Vl
RT
D.U.T.
VO
50pF
CL
RL= 1k
Test Circuit for Outputs
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitiance
RT = Termination resistance should be equal to ZOUT of pulse generators.
TEST
tPLH/tPHL
VCC
< 2.7V
2.7–3.6V
≥ 4.5 V
VI
VCC
2.7V
VCC
SV00902
Figure 4. Load circuitry for switching times
1998 May 07
7
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