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PIC18LF4331 View Datasheet(PDF) - Microchip Technology

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PIC18LF4331 Datasheet PDF : 392 Pages
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PIC18F2331/2431/4331/4431
TABLE 1-3: PIC18F4331/4431 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin Buffer
PDIP TQFP QFN Type Type
Description
MCLR/VPP/RE3
MCLR
VPP
RE3
1 18 18
Master Clear (input) or programming voltage (input).
I
ST
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
P
Programming voltage input.
I
ST
Digital input. Available only when MCLR is disabled.
OSC1/CLKI/RA7
OSC1
CLKI
RA7
13 30 32
Oscillator crystal or external clock input.
I
ST
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode; CMOS otherwise.
I CMOS External clock source input. Always associated with pin
function OSC1. (See related OSC1/CLKI, OSC2/CLKO
pins.)
I/O TTL General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
14 31 33
Oscillator crystal or clock output.
O—
Oscillator crystal output. Connects to crystal or resonator
in Crystal Oscillator mode.
O—
In RC mode, OSC2 pin outputs CLKO, which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
I/O TTL General purpose I/O pin.
Legend:
Note 1:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
I
= Input
O = Output
P
= Power
RC3 is the alternate pin for T0CKI/T5CKI; RC4 is the alternate pin for SDI/SDA; RC5 is the alternate pin
for SCK/SCL; RC7 is the alternate pin for SDO.
2: RD4 is the alternate pin for FLTA.
3: RD5 is the alternate pin for PWM4.
2010 Microchip Technology Inc.
DS39616D-page 19

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