Preliminary
RT8101/A
Par amete r
Symbol
Test Conditions
Ramp Amplitude
Reference Voltage
PWM Error Amplifier Reference
Error Amplifier
Open Loop DC Gain
Gain-Bandwidth Product
Slew Rate
ΔVOSC VCC = 12V
VREF
AO
GBW
SR
PWM Controller Gate Drivers (VCC = 12V)
Upper Gate Source
IUGATE
Upper Gate Source
RUGATE
Upper Gate Sink
Lower Gate Source
Lower Gate Source
Lower Gate Sink
Protection
RUGATE
ILGATE
RLGATE
RLGATE
VBOOT − VP HASE = 12V,
VBOOT − VUGATE = 6V
VBOOT − VP HASE = 12V,
VBOOT − VUGATE = 1V
VBOOT − VPHASE = 12V,
VUGATE − VPHASE = 1V
VCC = 12V, VLGATE = 6V
VCC − VLGATE = 1V
VLGATE = 1V
Min Typ Max Units
--
1. 5
-- VP-P
0.792 0.8 0.808 V
-- 88 -- dB
-- 15 -- MHz
--
6
-- V/us
-- 300 -- mA
--
7 10 Ω
--
4
8
Ω
-- 500 -- mA
--
4
6
Ω
--
2
4
Ω
Under Voltage Protection
Over Current Threshold
Soft-Start Interval
Measuring VFB
VOC
Measuring VPHASE
TSS
0.3 0.4 0.5 V
−210 −250 −290 mV
2 3.2 4.2 ms
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a high effective 4-layers thermal conductivity test board of
JEDEC 51-7 thermal measurement standard.
DS8101/A-01 March 2007
www.richtek.com
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