Philips Semiconductors
PCI audio and video broadcast decoder
Product specification
SAA7134HL
handbook, full pagewidth
TV TUNER:
• CABLE
• TERRESTRIAL
• SATELLITE
IF-PLL:
• DVB
• ATV
DTV
DVB
DIGITAL CHANNEL DECODER:
• VSB
• QAM
• OFDM
I 2C - bus
I 2C - BUS
EEPROM
CVBS
S-video
audio I/O
line-in
line-out
AUDIO
DECODER:
• BTSC
audio
L/R
SIF CVBS
TS ENCODER:
• MPEG2
DIGITAL SOUND
PROCESSING:
• DOLBY
PROLOGIC
I2S-bus ITU656
I2S-bus
DECODER FOR TV SOUND AND TV VIDEO
WITH TS INTERFACE AND
DMA MASTER INTO PCI-BUS
SAA7134HL
PCI - bus
MHC166
Fig.1 Application diagram for capturing live TV video and audio streams in the PC, with optional extensions for
enhanced audio feature processing or DTV and DVB capture.
2.1 Introduction
The PCI audio and video broadcast decoder SAA7134HL
is a highly integrated, low cost and solid foundation for
TV capture in the PC, for analog TV and digital video
broadcast. The various multimedia data types are
transported over the PCI-bus by bus-master-write, to
optimum exploit the streaming capabilities of a modern
host based system. Legacy requirements are also taken
care of.
The SAA7134HL meets the requirements of PC Design
Guides 98/99 and 2001 and is PCI 2.2 and Advanced
Configuration and Power Interface (ACPI) compliant.
The analog video is sampled by 9-bit ADCs, decoded by a
multi-line adaptive comb filter and scaled horizontally,
vertically and by field rate. Multiple video output formats
(YUV and RGB) are available, including packed and
planar, gamma-compensated or black-stretched.
Analog TV sound is digitized and stereo decoded (NICAM
and dual FM standards). Audio is streamed digitally via the
PCI-bus or routed as an analog signal via the loop back
cable to the sound card.
The SAA7134HL provides a versatile peripheral interface
to support system extensions, e.g. MPEG encoding for
time shift viewing, or DSP applications for audio
enhancements.
The channel decoder for digital video broadcast reception
(ATSC or DVB) can re-use the integrated video ADCs.
The Transport Stream (TS) is collected by a tailored
interface and pumped through the PCI-bus to the system
memory in well-defined buffer structures. Various internal
events, or peripheral status information, can be enabled as
an interrupt on the PCI-bus.
2002 Dec 17
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