SC508/SC508A
Applications Information (continued)
If the internal LDO is used for bias power, the LDO switch-
over function must be inhibited by selecting the resistor
divider so that the voltage at the VOUT pin does not
exceed 4V; this will inhibit the VLDO switch-over func-
tion. If the SC508 bias power is from an external 5V supply
and the LDO is disabled by grounding the ENL pin, the
voltage at the VOUT pin is not limited to 4V and can be as
high as the VDDA supply voltage.
Note that the VOUT pin has an internal 500kW resistor
connected to AGND. To minimize the effect of this resistor
on the resistor divider ratio, the maximum recommend
value for resistor RV2 in Figure 4 is 10kW.
In addition to the resistor divider, the RTON resistor value
must be adjusted. The on-time is calculated according to
the voltage at the VOUT pin. In order to select the desired
on-time and operating frequency, the RTON resistor
should be adjusted to a higher value to compensate for
the reduced voltage at the VOUT pin. For output voltages
exceeding 5V, the required RTON value can be determined
by the following equation.
5721
¨¨©§
9287
9,1 u I6:
QV¸¸¹·
S) u 9287
u
9,1
u
¨¨©§
59
59
¸¸¹·
For applications where VOUT exceeds 5V, FCM operation is
recommended.
Forced Continuous Mode Operation
The SC508 operates the switcher in Forced Continuous
Mode (FCM) by connecting the PSV pin to VDDA. The PSV
pin should never exceed the VDDA supply. See Figure 5
for FCM waveforms. In this mode one of the power
MOSFETs is always on, with no intentional dead time other
than to avoid cross-conduction. This results in more
uniform frequency across the full load range with the
trade-off being reduced efficiency at light loads due to
the high-frequency switching of the MOSFETs.
The PSV pin contains a 5μA current sink to prevent stray
leakage current from pulling the PSV pin up to the VDDA
supply when the PSV pin is floated to select Power-Save
operation. To select Forced Continuous Mode operation,
the maximum recommended resistance between the
VDDA supply and the PSV pin is 40kW.
FB Ripple
Voltage (VFB)
FB threshold
Inductor
Current
DC Load Current
On-time DH on-time is triggered when
(TON) VFB reaches the FB Threshold.
DH
DL
DL drives high when on-time is completed.
DL remains high until VFB falls to the FB threshold.
Figure 5 — Forced Continuous Mode Operation
Programmable Ultrasonic Power-Save Operation
The device provides programmable ultrasonic power-save
operation at light loads; the minimum operating fre-
quency is programmed by connecting a resistor from PSV
to AGND. The SC508 uses the PSV resistor to set an inter-
nal timer that monitors the time between consecutive
high-side gate pulses. If the time exceeds the programmed
timer, DL drives high to turn the low-side MOSFET on. This
draws current from VOUT through the inductor, forcing both
VOUT and VFB to fall. When VFB drops to the 600mV thresh-
old, the next DH on-time is triggered. After the on-time is
completed the high-side MOSFET is turned off and the
low-side MOSFET turns on, and the internal timer is
restarted. The low-side MOSFET remains on until the
inductor current ramps down to zero, at which point the
low-side MOSFET is turned off. This ends the cycle until VFB
again falls below the 600mV threshold, or the internal
timer forces another DL turn-on.
15