SC92031
(Continued)
Pin No.
Power Pins
6,21,33,42,
84,97
67
52,60,66
2,17,
30,38,39, 51
55, 58, 63
LED Interface
Symbol
VDD
VDD_IR
VDDAH_RX
VDDAH_CM
AVDD
GND
VSA_RX
VSA_CM
AGND
76,75,74,72
ACT, LINK,
SPEED,DUPL
EX
Description
+3.3V (Digital)
+3.3V (Analog)
Ground
Ground (Analog)
LED0 displays for activity status. This pin will be driven with 5 Hz frequency
when either effective receiving or transmitting is detected.
LED1 displays for link status.
LED2 displays for 100 M link status.
LED3 displays for full-duplex mode.
64
TX+
65
TX-
54
RX+
53
RX-
62
XTAL25I
61
XTAL25O
Multi-Function Interface
78
REQB2
79
GNTB2
73
IDSEL2
Test And Other Pins
70
TM0
69
TM1
34
ROM_OE
100/10BASE-T transmit (Tx) data
100/10BASE-T receive (Rx) data
25 MHz crystal/OSC. Input
Crystal feedback output, This output is used in crystal connection only. It
must be left open when X1 is driven with an external 25 MHz oscillator.
Request2, The 2nd device will assert this pin low to request the ownership
of the PCI bus.
Grant2, This signal is asserted low to indicate that the central arbiter has
granted ownership of the bus to the 2nd device.
Initialization device select 2, Used as a chip-select during configuration read
and write transactions to the 2nd device.
Chip test pin
ROM Chip Select and Output Enable, This is the chip select signal and
output enable for the Boot PROM.
(To be continued)
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.0 2004.08.03
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