ST8016 View Datasheet(PDF) - Sitronix Technology Co., Ltd.
Part Name
Description
Manufacturer
ST8016 Datasheet PDF : 28 Pages
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ST8016
(Segment Mode 3)
(VSS = 0 V, VDD = +5.0± 0.5 V, V0 = + 15.0 to +30.0 V, TOPR = -25 to +85 °C)
PARAMETER
SYMBOL CONDITIONS MIN.
Shift clock period
tWCK
tR,tF ≤ 10ns
50
Shift clock "H" pulse width
tWCKH
15
Shift clock "L” pulse width
tWCKL
15
Data setup time
tDS
10
Data hold time
tDH
12
Latch pulse "H" pulse width
tWLPH
15
Shift clock rise to latch pulse rise time tLD
0
Shift clock fall to latch pulse fall time
tSL
25
Latch pulse rise to shift clock rise time tLS
25
Latch pulse fall to shift clock fall time
tLH
25
Enable setup time
tS
10
Input signal rise time
tR
Input signal fall time
tF
DISPOFF removal time
tSD
100
DISPOFF "L" pulse width
tWDL
1.2
Output delay time (1)
tD
CL = 15 pF
Output delay time (2)
tPD1, t PD2 CL = 15 pF
Output delay time (3)
t PD3
CL = 15 pF
NOTES:
1. Takes the cascade connection into consideration.
2. (tWCK - tWCKH - tWCKL)/2 is maximum in the case of high speed operation.
TYP.
MAX.
50
50
30
400
400
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
NOTE
1
2
2
(Common Mode)
(VSS = 0 V, VDD = +2.5 to +5.5 V, V0 = + 15.0 to +30.0 V, TOPR = -25 10+85 °C)
PARAMETER
Shift clock period
Shift clock “H” pulse width
Data setup time
Data hold time
Input signal rise time
Input signal fall time
DISPOFF removal time
DISPOFF “L” pulse width
Output delay time (1)
Output delay time (2)
Output delay time (3)
SYMBOL
tWLP
tWLPH
tSU
tH
tR
tF
tSD
tWDL
tDL
tPD1,tPD2
tPD3
CONDITIONS
tR, tF 20ns
VDD=5± 0.5V
VDD=2.5~4.5V
CL=10pF
CL=10pF
CL=10pF
MIN TYP MAX
250
15
30
30
50
50
50
100
1.2
200
1.2
1.2
UNIT
ns
ns
ns
ns
ns
ns
ns
us
ns
us
us
Ver 2.0
Page 19/28
2008/05/07
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