ST8024 View Datasheet(PDF) - Sitronix Technology Co., Ltd.
Part Name
Description
Manufacturer
ST8024 Datasheet PDF : 28 Pages
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ST8024
15 REVISION
REVISION
0.20
0.21
0.24
0.25
0.26
0.27
0.28
0.29
0.30
0.31
1.0
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
DESCRIPTION
Add pad location and gold bump data
Add BLANK contrast control information
Add TCP (F4) information
Remove TCP information to another PDF file
ST8024TCP(F4).PDF
Gold bump strength=30g, update IC diagram
Correct wrong word mistake
Correct parameter name
Correct DI to FLM
Change operating temperature from -20°C~85°C to
-25°C~85°C
Change description of TEST1 pin in PIN DESCRIPTION(TCP)
Add 1 and 48 Gold Bump size
Modify TCP package
Rename V5 to Vss and some pins' description
Modify PAD sequence
Add alignment mark
Add max value for input high voltage
Add wafer thickness information and roughly TCP drawing
information.
Modify chip size and thickness with scribe line and Spec
arrangement
Modify all the data about absolute max voltage and recommend max
voltage
Modify Pad Diagram
Add application note
Modify Pad Location
PAGE
DATE
16
1-27
2006/12/11
2006/12/25
2,16-19
23
27
24
2007/05/25
2008/1/14
2008/05/07
2009/0819
The above information is the exclusive intellectual property of Sitronix Technology Corp. and shall not be disclosed, distributed or reproduced without
permission from Sitronix.
Ver 2.1
Page 28/28
2009/08/19
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