Philips Semiconductors
Multiple voltage regulator with switch and
ignition buffer
Product specification
TDA3681
SYMBOL
PARAMETER
CONDITIONS
Vth(r)(REG3) rising threshold voltage VP2 rising; note 3
of regulator 3
Vth(f)(REG3)
falling threshold voltage VP2 falling; note 3
of regulator 3
Vhys(REG3)
hysteresis voltage due to
regulator 3
Vth(r)(REG4) rising threshold voltage VP2 rising; note 3
of regulator 4
Vth(f)(REG4)
falling threshold voltage VP2 falling; note 3
of regulator 4
Vhys(REG4)
hysteresis voltage due to
regulator 4
Vth(r)(VP)
rising threshold voltage VEN = 0 V
of supply voltage
Vth(f)(VP)
falling threshold voltage VEN = 0 V
of supply voltage
Vhys(VP)
hysteresis voltage of
supply voltage
VEN = 0 V
Reset and hold buffer
Isink(L)
ILO
Isource(H)
LOW-level sink current
output leakage current
HIGH-level source
current
VRES ≤ 0.8 V; VHOLD ≤ 0.8 V
VP2 = 14.4 V; VHOLD = 5 V
VP2 = 14.4 V; VRES = 5 V
tr
rise time
tf
fall time
Reset delay
note 4
note 4
Ich
reset delay capacitor
VCRES = 0 V
charge current
Idch
Vth(r)(RES)
reset delay capacitor
discharge current
rising voltage threshold
reset signal
VCRES = 3 V;
VP1 = VP2 = 4.3 V
Vth(f)(RES)
falling voltage threshold
reset signal
td(RES)
td(SW)
delay reset signal
delay power switch
foldback protection
CRES = 47 nF; note 5
CRES = 47 nF; note 6
Regulator 1 (IREG1 = 5 mA; unless otherwise specified)
Vo(off)
Vo(REG1)
∆Vline
∆Vload
output voltage off
output voltage
line regulation
load regulation
1 mA ≤ IREG1 ≤ 600 mA
9.5 V ≤ VP1 ≤ 18 V
9.5 V ≤ VP1 ≤ 18 V
1 mA ≤ IREG1 ≤ 600 mA
MIN.
TYP.
MAX.
UNIT
−
VREG3 − 0.15 VREG3 − 0.075 V
4.3 VREG3 − 0.35 −
V
−
0.2
−
V
−
VREG4 − 0.15 VREG4 − 0.075 V
2.7 VREG4 − 0.3 −
V
−
0.15
−
V
9.1 9.7
10.3
V
9.0 9.4
9.8
V
−
0.3
−
V
2
−
−
mA
−
0.1
5
µA
240 400
900
µA
−
7
50
µs
−
1
50
µs
2
4
8
µA
1.0 1.6
−
mA
2.5 3.0
3.5
V
1.0 1.2
1.4
V
20 35
70
ms
8
17.6
40
ms
−
1
400
mV
8.0 8.5
9.0
V
8.0 8.5
9.0
V
−
2
75
mV
−
20
85
mV
2002 Apr 10
14