Philips Semiconductors
10-bit high-speed analog-to-digital
converter
Product specification
TDA8760
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
EFFECTIVE BITS; notes 4 and 5; see Figs 6, 8 and 9
EB
effective bits
fi = 4.43 MHz
TDA8760K/2 (fclk = 20 MHz) fi = 7.5 MHz
effective bits
fi = 4.43 MHz
TDA8760K/4 (fclk = 40 MHz) fi = 10 MHz
fi = 15 MHz
−
8.90
−
bits
−
8.70
−
bits
−
8.80
−
bits
−
8.80
−
bits
−
8.70
−
bits
TWO-TONE
Two-tone two-tone intermodulation
fclk = 40 MHz; note 8
−
−65
−
dB
rejection
BIT ERROR RATE
BER
bit error rate
fclk = 40 MHz;
−
fi = 4.43 MHz; VI = ±16 LSB
at code 512
2 × 10−12 −
times/
samples
DIFFERENTIAL GAIN; SEE Fig.5
Gdiff
differential gain
fclk = 20 MHz; fi = 4.43 MHz −
0.5
−
%
fclk = 40 MHz; fi = 4.43 MHz −
1.0
−
%
DIFFERENTIAL PHASE
Φdiff
differential phase
fclk = 40 MHz; fi = 4.43 MHz −
0.1
0.2
deg
Analog signal processing in single input mode; see Table 2; 50% clock duty factor; VI(p-p) = VrefH − VrefL = 1.4 V
LINEARITY
ILE
DC integral linearity error
fclk = 4 MHz
−
DLE
DC differential linearity error fclk = 4 MHz
−
AILE
AC integral linearity error
note 3
−
BANDWIDTH (fclk = 40 MHZ); note 9
B
Analog bandwidth
−1 dB
−
−3 dB
−
HARMONICS (fclk = 40 MHZ); see Fig.7
f1
fundamental harmonics
fi = 4.43 MHz
−
(full scale)
fall
harmonics (full scale);
fi = 4.43 MHz
all components
second harmonics
−
third harmonics
−
THD
total harmonic distortion
fi = 4.43 MHz; note 2
−
±1.0
±2.0
LSB
±0.6
±1.0
LSB
±1.2
±2.0
LSB
140
−
220
−
MHz
MHz
−
0
dB
−61
−
dB
−62
−
dB
−59
−
dB
1996 Sep 12
11