TP83C51FB View Datasheet(PDF) - Intel
Part Name
Description
Manufacturer
TP83C51FB Datasheet PDF : 20 Pages
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8XC51FX
PROGRAMMING THE EPROM OTP
To be programmed the part must be running with a
4 to 6 MHz oscillator (The reason the oscillator
needs to be running is that the internal bus is being
used to transfer address and program data to appro-
priate internal EPROM locations ) The address of an
EPROM location to be programmed is applied to
Port 1 and pins P2 0 - P2 4 of Port 2 while the code
byte to be programmed into that location is applied
to Port 0 The other Port 2 and 3 pins RST PSEN
and EA VPP should be held at the ‘‘Program’’ levels
indicated in Table 4 ALE PROG is pulsed low to
program the code byte into the addressed EPROM
location The setup is shown in Figure 10
Normally EA VPP is held at logic high until just be-
fore ALE PROG is to be pulsed Then EA VPP is
raised to VPP ALE PROG is pulsed low and then
EA VPP is returned to a valid high voltage The volt-
age on the EA VPP pin must be at the valid EA VPP
high level before a verify is attempted Waveforms
and detailed timing specifications are shown in later
sections of this data sheet
NOTE
EA VPP pin must not be allowed to go above the
maximum specified VPP level for any amount of
time Even a narrow glitch above that voltage lev-
el can cause permanent damage to the device
The VPP source should be well regulated and free
of glitches
Mode
Program Code Data
Verify Code Data
Program Encryption
Array Address 0– 3FH
Program Lock
Bits
Bit 1
Bit 2
Bit 3
Read Signature Byte
Table 4 EPROM Programming Modes
RST
H
PSEN
L
ALE
PROG
EA
VPP
12 75V
P2 6
L
P2 7
H
H
L
H
H
L
L
H
L
12 75V L
H
H
L
H
L
H
L
H
L
12 75V H
H
12 75V H
H
12 75V H
L
H
H
L
L
P3 3
H
L
H
H
H
H
L
P3 6
H
H
L
H
L
H
L
P3 7
H
H
H
H
L
L
L
See Table 4 for proper input on these pins
Figure 10 Programming the EPROM
16
272322 – 20
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