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UPD16664N View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD16664N Datasheet PDF : 52 Pages
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µ PD16664
9. LSI LAYOUT AND ADDRESS MANAGEMENT
Addresses are managed so that up to four µ PD16664s can be used to organize a liquid crystal display of 416 x 320
pixels.
Four modules can be connected on the same bus with the /CS, /WE, and /OE pins shared.
The system can treats one screenful of the liquid crystal display as one memory area, and does not have to decode
more than one LSI.
Specify an LSI No. by using the PL0 and PL1 pin to determine the layout of the LSIs, and determine the direction
(vertical or horizontal) of the liquid crystal display by using the DIR pin.
PL1
PL0
0
0
0
1
1
0
1
1
LSI No.
No. 0
No. 1
No. 2
No. 3
10. NUMBER OF COLUMN OUTPUTS SELECTION
CMODE1
CMODE0
Number of Column Outputs
0
0
208
0
1
184
1
0
160
1
1
144
Remark Invalid column outputs are fastened to V1 level.
Valid Pins
Y1 to Y208
Y1 to Y184
Y1 to Y160
Y1 to Y144
11. DUTY SELECTION
DMODE
Duty
0
1/160
1
1/128 Note
Note Valid row outputs of µ PD16667 are X1 to X128. Invalid row outputs are undefined.
12
Data Sheet S13780EJ1V0DS00

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