µPD17933, 17934
FUNCTIONAL OUTLINE
Part Number
Program memory (ROM)
General-purpose data memory (RAM)
Instruction execution time
General-purpose port
Stack level
Vector interrupt
(maskable interrupt)
Timer
A/D converter
LCD controller/driver
Serial interface
PLL frequency Division mode
synthesizer
Reference frequency
Charge pump
Phase comparator
Intermediate frequency (IF)
counter
BEEP output
Reset
Supply voltage
Package
µPD17933
µPD17934
12K bytes (6144 x 16 bits)
16K bytes (8192 x 16 bits)
448 × 4 bits
53.3 µs (with 75-MHz crystal oscillator)
37 pins
• I/O port : 20 pins
• Input port : 11 pins (of which 3 are muxed with LCD segment
pins)
• Output port : 6 pins
• Address stack : 15 levels (stack can be manipulated)
• Interrupt stack : 4 levels (stack can be manipulated)
• External : 1 source (INT)
• Internal : 3 sources (basic timer 0, 8-bit timer, serial interface)
3 channels
• Basic timer 0 (125 ms)
• Basic timer 1 (8 ms, 32 ms)
• 8-bit timer (with event counter)
8-bits resolution × 3 channels
• 20 segments, 4 commons
• 1/4 duty, 1/2 bias, frame frequency: 62.5 Hz, drive voltage VLCD1=3.0 V TYP.
• Muxed segment pins: 3 (Each can be used as general-purpose input port pin.)
1 channel (3-wire/2-wire modes selectable)
2 types • Direct division mode (VCOL pin)
• Pulse swallow mode (VCOL pin/VCOH pin)
6 types selectable (1, 3, 5, 6.25, 12.5, 25 kHz)
Error out output: 2 pins (EO0 and EO1 pins)
Unlock detectable by program
Frequency measurement
• AMIFC pin: 400 to 500 kHz
• FMIFC pin: 10 to 11 MHz
1 pin (1.5 kHz, 3 kHz)
• Reset by RESET pin
• Watchdog timer reset
Can be set only once on power application: 4096 or 8192 instructions
selectable
• Stack pointger overflow/underflow reset
Can be set only once on power application: Interrupt stack and address stack
selectable
VDD = 1.05 to 1.8 V
80-pin plastic TQFP (12 × 12 mm, 0.5 mm pitch)
2