UPD17934 View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
Manufacturer
UPD17934
NEC => Renesas Technology
UPD17934 Datasheet PDF : 252 Pages
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µPD17933, 17934
13. TIMERS ........................................................................................................................................... 120
13.1 Outline of Timers ............................................................................................................... 120
13.2 Basic Timer 0 ...................................................................................................................... 121
13.3 Basic Timer 1 ...................................................................................................................... 125
13.4 Timer 0 ................................................................................................................................. 131
14. A/D CONVERTER .......................................................................................................................... 138
14.1 Outline of A/D Converter .................................................................................................. 138
14.2 Input Selection Block ........................................................................................................ 139
14.3 Compare Voltage Generation and Compare Blocks ..................................................... 141
14.4 Comparison Timing Chart ................................................................................................ 143
14.5 Using A/D Converter .......................................................................................................... 144
14.6 Cautions on Using A/D Converter ................................................................................... 148
14.7 Status at Reset ................................................................................................................... 148
15. SERIAL INTERFACE ..................................................................................................................... 149
15.1 General ................................................................................................................................ 149
15.2 Clock Input/Output Control Block and Data Input/Output Control Block ................. 150
15.3 Clock Control Block .......................................................................................................... 153
15.4 Clock Counter ..................................................................................................................... 153
15.5 Presettable Shift Register ................................................................................................. 154
15.6 Wait Control Block ............................................................................................................. 154
15.7 Serial Interface Operation ................................................................................................. 155
15.8 Notes on Setting and Reading Data ................................................................................ 159
15.9 Operation Mode and Operational Outline of Each Blocks ........................................... 160
15.10 Status on Reset .................................................................................................................. 162
16. PLL FREQUENCY SYNTHESIZER ............................................................................................... 163
16.1 Outline of PLL Frequency Synthesizer ........................................................................... 163
16.2 Input Selection Block and Programmable Divider ........................................................ 164
16.3 Reference Frequency Generator ..................................................................................... 168
16.4 Phase Comparator (f-DET), Charge Pump, and Unlock FF ......................................... 170
16.5 PLL Disabled Status .......................................................................................................... 174
16.6 Using PLL Frequency Synthesizer .................................................................................. 175
16.7 Status at Reset ................................................................................................................... 179
17. INTERMEDIATE FREQUENCY (IF) COUNTER ........................................................................... 180
17.1 Outline of Frequency Counter ......................................................................................... 180
17.2 IF Counter Input Selection Block and Gate Time Control Block ................................ 181
17.3 Start/Stop Control Block and IF Counter ....................................................................... 183
17.4 Using IF Counter ................................................................................................................ 189
17.5 Status at Reset ................................................................................................................... 191
18. BEEP ............................................................................................................................................... 192
18.1 Outlines of BEEP ............................................................................................................... 192
18.2 Output Wave Form of BEEP ............................................................................................. 194
18.3 Status at Reset ................................................................................................................... 195
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