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SAA7183BWP/00 View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
SAA7183BWP/00
Philips
Philips Electronics 
SAA7183BWP/00 Datasheet PDF : 40 Pages
First Prev 31 32 33 34 35 36 37 38 39 40
Philips Semiconductors
Digital Video Encoder (EURO-DENC)
handbook, full pagewidth
LLC clock output
LLC clock input
tHIGH
tHD; DAT
tHIGH
input data
tHD; DAT
tSU; DAT
valid
output data
tHD; DAT
valid
TLLC
tf
TLLC
tf
not valid
td
not valid
Fig.13 Clock data timing.
Preliminary specification
SAA7182; SAA7183
tr
tr
valid
2.6 V
1.5 V
0.6 V
2.4 V
1.5 V
0.8 V
2.0 V
0.8 V
valid
2.4 V
0.6 V
MBE742
handbook, full pagewidth
LLC
MP(n)
RCV2
Cb(0)
Y(0)
Cr(0)
Y(1)
Cb(2)
MGB699
The data demultiplexing phase is coupled to the internal horizontal phase.
The phase of the RCV2 signal is programmed to 0F8h (110h for 50 Hz) in this example in output mode (RCV2S).
Fig.14 Functional timing.
1996 Jul 08
31

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