74LV4066PW,112 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
74LV4066PW,112 Datasheet PDF : 22 Pages
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74LV4066
Quad bilateral switches
Rev. 4 — 9 December 2015
Product data sheet
1. General description
The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible
with the 74HC4066 and 74HCT4066.
The 74LV4066 has four independent switches. Each switch has two input/output pins
(nY, nZ) and an active HIGH enable input pin (nE). When nE is LOW the corresponding
analog switch is turned off.
The 74LV4066 has a ON-resistance which is reduced in comparison with the 74HCT4066.
2. Features and benefits
Optimized for low-voltage applications: 1.0 V to 3.6 V
Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 C
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Very low ON-resistance:
60 (typical) at VCC = 2.0 V
35 (typical) at VCC = 3.0 V
25 (typical) at VCC = 4.5 V
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +80 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
Version
74LV4066D 40 C to +125 C SO14
plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
74LV4066DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74LV4066PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
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