SSM2412P View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

SSM2412P

Dual Audio Analog Switches

Analog Devices 

SSM2402/SSM2412

APPLICATIONS INFORMATION

FUNCTIONAL SECTIONS

Each half of the SSM2402/SSM2412 are made up of three major

functional blocks:

1. “T” Switch

Consists of JFET switches S1 and S2 in series as the main

switches and switch S3 as a shunt.

2. Ramp Generator

Generates a ramp voltage on command of the Control Input

(see Figure 1). A LOW-to-HIGH TTL input at Control

Input initiates a ramp that goes from approximately –7 V to

+7 V in 12 ms. Conversely, a HIGH-to-LOW TTL transi-

tion at Control Input will cause a downward ramp from ap-

proximately +7 V to –7 V in 12 ms for the SSM2402, and

4 ms for the SSM2412. The Ramp Generator also supplies

the +3 V and –3 V reference levels for Switch Control.

3. Switch Control

The ramp from the Ramp Generator section is applied to two

differential amplifiers (DA1 and DA2) in the Switch Control

block. (See Simplified Schematic). One amplifier is refer-

enced to –3 V and the other is referenced to +3 V. Switch

Control Outputs are:

—Main Switch Control—Drives two 0.25 mA current

sources that control the inverting inputs of each op amp.

When ON, the current sources cause a gate-to-source volt-

age of approximately 2.5 V which is sufficient to turn off

S1 and S2. When the current sources from Main Switch

Control are OFF, each op amp acts as a unity-gain fol-

lower (VGS = 0) and both switches (S1 and S2) will be ON.

—Shunt Switch Control—Controls the Shunt Switch of

the “T” configuration.

Figure 1. Ramp Generator

SWITCH OPERATION

Unlike conventional analog switches, the SSM2402/SSM2412

are designed to ramp on and off gradually over several millisec-

onds. The soft transition prevents popping or clicking in audio

systems. Transients are minimized in active filters when the

SSM2402/SSM2412 are used to switch component values.

To see how the SSM2402/SSM2412 switches work, first con-

sider an OFF-to-ON transition. The Control Input is initially

LOW and the Ramp Output is at approximately –7 V. The

Main Switch Control is HIGH which drives current sources Q3

and Q4 to 0.25 mA each. These currents generate 2.5 V gate-

to-source back bias for each JFET switch (S1 and S2) which

holds them OFF.

The Shunt Switch Control is negative which holds the shunt

JFET S3 ON. Undesired feedthrough signals in the series JFET

switches S1 and S2 are shunted to the negative supply rail

through S3.

Figure 2. Switch Control

When the Control Input goes from LOW to HIGH, the Ramp

Generator slews in the positive direction as shown in Figure 2.

When the ramp goes more positive than –3 V, the Shunt Switch

Control is pulled positive by differential amplifier DA2 which

thereby puts shunt switch S3 into the OFF state. Note that S1

and S2 are still OFF, so at this time all three switches in the

“T” are OFF.

REV. A

–7–

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