AD13465BZ View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD13465BZ
Analog Devices
AD13465BZ Datasheet PDF : 20 Pages
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AD13465
Parameter
Temp
Test
Level
Mil
Sub-Group
AD13465AZ/BZ
Min
Typ
Max Unit
SPURIOUS-FREE DYNAMIC RANGE9
Analog Input @ 4.98 MHz
25°C
V
Analog Input @ 9.9 MHz
25°C
I
4
Full
II
5, 6
Analog Input @ 21 MHz
25°C
I
4
Full
II
5, 6
Analog Input @ 32 MHz
25°C
V
Full
V
85
80
86
78
84
69
76
68
74
63
62
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
SINGLE-ENDED ANALOG INPUT
Pass-Band Ripple to 10 MHz
25°C
V
0.05
dB
Pass-Band Ripple to 25 MHz
25°C
V
0.1
dB
OBSOLETE DIFFERENTIAL ANALOG INPUT
Pass-Band Ripple to 10 MHz
Pass-Band Ripple to 25 MHz
25°C
V
25°C
V
TWO-TONE IMD REJECTION10
fIN = 9.1 MHz and 10.1 MHz
f1 and f2 are –7 dB
fIN = 19.1 MHz and 20.7 MHz
f1 and f2 are –7 dB
25°C
I
Full
II
25°C
V
CHANNEL-TO-CHANNEL ISOLATION11 25°C
IV
TRANSIENT RESPONSE
25°C
V
DIGITAL OUTPUTS12
Logic Compatibility
DVCC = 3.3 V
Logic 1 Voltage
Logic 0 Voltage
Full
I
Full
I
4
5, 6
12
1, 2, 3
1, 2, 3
0.3
dB
0.82
dB
75.5
82
dBc
74.5
80
72
dBc
90
dB
15.3
ns
CMOS
2.5
DVCC – 0.2
V
0.2
0.5 V
DVCC = 5 V
Logic 1 Voltage
Full
V
DVCC – 0.3
V
Logic 0 Voltage
Full
V
0.35
V
Output Coding
Two’s Complement
POWER SUPPLY
AVCC Supply Voltage13
Full
VI
I (AVCC) Current
AVEE Supply Voltage13
Full
V
Full
VI
I (AVEE) Current
Full
V
DVCC Supply Voltage13
Full
VI
I (DVCC) Current
Full
V
(Total) Supply Current per Channel
Full
I
Power Dissipation (Total)
Full
I
Power Supply Rejection Ratio (PSRR)
Full
V
1, 2, 3
1, 2, 3
4.85
5.0
270
–5.25
–5.0
38
3.135
3.3
34
369
3.57
0.02
5.25
308
–4.75
49
3.465
46
403
3.9
V
mA
V
mA
V
mA
mA
W
%FSR/%VS
NOTES
1 Gain tests are performed on AMP-IN-X-1 input voltage range.
2 Input capacitance spec. combines AD8037 capacitance and ceramic package capacitance.
3 Full Power Bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
4 For differential input: +IN = 1 V p-p and –IN = 1 V p-p (signals are 180° out of phase). For single ended input: +IN = 2 V p-p and –IN = GND.
5 All ac specifications tested by driving ENCODE and ENCODE differentially. AMP-IN-X-1 = 1 V p-p, AMP-IN-X-2 = GND.
6 Minimum and Maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%.
7 Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed).
Encode = 65 MSPS. SNR is reported in dBFS, related back to converter full scale.
8 Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics.
Encode = 65 MSPS. SINAD is reported in dBFS, related back to converter full scale.
9 Analog Input signal power at –1 dBFS; SFDR is ratio of converter full scale to worst spur.
10Both input tones at –7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product.
11Channel-to-channel isolation tested with A Channel grounded and a full-scale signal applied to B Channel.
12 Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF will degrade performance.
13 Supply voltage recommended operating range. AVCC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range
AVCC = 5.0 V to 5.25 V.
Specifications subject to change without notice.
REV. A
–3–
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