M62392P(2008) View Datasheet(PDF) - Renesas Electronics
Part Name
Description
Manufacturer
M62392P Datasheet PDF : 9 Pages
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M62392P/FP
I2C BUS Line Characteristics
Normal Mode
Item
Symbol
Min
Max
Unit
SCL clock frequency
Time the bus must be free before a new transmission can start
Hold time START condition.
After this period, the first clock pulse is generated.
fSCL
0
100
kHz
tBUF
4.7
—
µs
tHD : STA
4.0
—
µs
Low period of the clock
High period of the clock
Setup time for START condition
(only relevant for a repeated START condition)
tLOW
4.7
—
µs
tHIGH
4.0
—
µs
tSU : STA
4.7
—
µs
Hold time DATA
tHD : DAT
0
—
µs
Setup time DATA
tSU : DAT
250
—
ns
Rise time of both SDA and SCL lines
tR
—
1000
ns
Fall time of both SDA and SCL lines
Setup time for STOP condition
tF
—
300
ns
tSU : STO
4.0
—
µs
Note: Transmitter must internally provide at least a hold time to bridge the undefined region (300 ns Max) of the falling
edge of SCL.
Timing Chart
tR, tF
tBUF
VIH
SDA
VIL
tHD:STA
tSU:DAT
tHD:DAT
tSU:STA
tSU:STO
VIH
SCL
VIL
Start
tLOW
tHIGH
Start
Stop
Start
REJ03D0883-0300 Rev.3.00 Mar 25, 2008
Page 4 of 8
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