MH8V6445BWZJ View Datasheet(PDF) - MITSUBISHI ELECTRIC
Part Name
Description
Manufacturer
MH8V6445BWZJ
MITSUBISHI ELECTRIC
MH8V6445BWZJ Datasheet PDF : 22 Pages
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Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V6445BWZJ -5, -6
HYPER PAGE MODE 536870912 - BIT ( 8388608 - WORD BY 64 - BIT ) DYNAMIC RAM
Read and Refresh Cycles
Limits
Symbol
Parameter
-5
-6
Min
Max
Min
Max
tRC
Read cycle time
84
104
tRAS /RAS low pulse width
50
10000
60
10000
tCAS /CAS low pulse width
8
10000
10
10000
tCSH
tRSH
/CAS hold time after /RAS low
/RAS hold time after /CAS low
35
40
13
15
tRCS Read Setup time after /CAS high
0
0
tRCH Read hold time after /CAS low
(Note 22)
0
0
tRRH Read hold time after /RAS low
(Note 22)
0
0
tRAL Column address to /RAS hold time
25
30
tCAL Column address to /CAS hold time
13
18
tORH
tOCH
/RAS hold time after /OE low
/CAS hold time after /OE low
13
15
13
15
Note 22: Either tRCH or tRRH must be satisfied for a read cycle.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Cycle (Early Write and Delayed Write)
Symbol
Parameter
Limits
-5
-6
Unit
tWC
Write cycle time
Min
Max
Min
Max
84
104
ns
tRAS /RAS low pulse width
50
10000
60
10000
ns
tCAS
tCSH
tRSH
/CAS low pulse width
/CAS hold time after /RAS low
/RAS hold time after /CAS low
8
10000
10
10000
ns
35
40
ns
13
15
ns
tWCS Write setup time before /CAS low
(Note 24)
0
0
ns
tWCH Write hold time after /CAS low
8
10
ns
tCWL /CAS hold time after /W low
8
10
ns
tRWL /RAS hold time after /W low
8
10
ns
tWP
Write pulse width
8
10
ns
tDS
Data setup time before /CAS low or /W low
0
0
ns
tDH
Data hold time after /CAS low or /W low
8
10
ns
Read-Write and Read-Modify-Write Cycles
Symbol
Parameter
Limits
-5
-6
Unit
Min
Max
Min
Max
tRWC Read write/read modify write cycle time (Note23) 109
133
ns
tRAS /RAS low pulse width
75
10000
89
10000
ns
tCAS /CAS low pulse width
38
10000
44
10000
ns
tCSH /CAS hold time after /RAS low
70
82
ns
tRSH /RAS hold time after /CAS low
38
44
ns
tRCS Read setup time before /CAS low
0
0
ns
tCWD Delay time, /CAS low to /W low
(Note24)
28
32
ns
tRWD Delay time, /RAS low to /W low
(Note24)
65
77
ns
tAWD Delay time, address to /W low
(Note24)
40
47
ns
tOEH /OE hold time after /W low
13
15
ns
Note 23: tRWC is specified as tRWC(min)=tRAC(max)+tODD(min)+tRWL(min)+tRP(min)+4tT.
24:tWCS, tCWD,tRWD ,tAWD and,tCPWD are specified as reference points only. If tWCS≥tWCS(min) the cycle is an early write cycle and the DQ pins will remain
high impedance throughout the entire cycle. If tCWD≥tCWD(min), tRWD≥tRWD (min), tAWD≥tAWD(min) and tCPWD ≥tCPWD(min) (for Hyper page mode cycle only),
the cycle is a read-modify-write cycle and the DQ will contain the data read from the selected address. If neither of the above condition (delayed write) of the DQ (at access
time and until /CAS or /OE goes back to VIH) is indeterminate.
MIT-DS-0234-0.0
MITSUBISHI
ELECTRIC
( 7 / 22 )
24/Jul./1998
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