MX93000
PIN DESCRIPTIONS :
SYMBOL
SDATA
SDEN\
DX
DR
FS
MCLK
VDD
GND
PRST
BAT\
VBAT
PDN\
VPOW
LIN
LOUT1
LOUT2
PIN TYPE
I/O(D)
I (D)
O (D)
I (D)
I (D)
I (D)
(D)
(D)
O (D)
O (A)
I (A)
O (A)
I (A)
I (A)
O (A)
O (A)
PIN NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DESCRIPTION
Bidirectional serial port ; It's an interface for microprocessor
serial data transfer
Serial data enable ; active low ; for starting to receive/transmit
serial data (A2-D0)
Transmit data pin (Codec serial data)
Receive data pin (Codec serial data)
Codec frame sync ; 8KHz frame synchronization clock for the
transmit/receive channel
Master clock input (MCLK=1.536 MHz)
When this pin is continuously high or low and set register4/bit-
6
"PDN=1", then the MX93000 will enter power-down mode
Digital power ; 5V power supply for all internal digital logic
Digital ground ; ground reference (0V) for all internal digital
logic
Power on reset (active high) ; Determined by PDN\ and BATT\
input signal
Battery detector output (active low); referenced to 1.25V
Battery detector input ; the voltage is divided from battery
power for reference to 1.25V
Power down detector output (active low) ; referenced to 1.25V
Power down detector input ; System DC power is divided and
then connected so as to compare with reference voltage
(1.25v)
Telephone signal line input , can be switched to PGA.
Telephone line output (postive) with PGA ; where PGA gain is
from 0 to 22.5dB
Telephone line output (negative) with PGA ; where PGA gain
is from 0 to 22.5dB
Note : "D" means digital
"A" means analog
19