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M2S56D20AKT View Datasheet(PDF) - Elpida Memory, Inc

Part Name
Description
Manufacturer
M2S56D20AKT
Elpida
Elpida Memory, Inc 
M2S56D20AKT Datasheet PDF : 41 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
M2S56D20/ 30/ 40AKT
256M Double Data Rate Synchronous DRAM
/CLK
CLK
Command
A0-9,11
A10
BA0,1
READ with Auto-Precharge (BL=8, CL=2,2.5)
0 1 2 3 4 5 6 7 8 9 10 11 12
ACT
READA
tRCD
Xa
Y
Xa
1
00
00
BL/2 + tRP
BL/2
tRP
CL=2
DQS
DQ
Qa0 Qa1 Qa2 Qa3 Qa4 Qa5 Qa6 Qa7
DQS
CL=2.5
DQ
Qa0 Qa1 Qa2 Qa3 Qa4 Qa5 Qa6 Qa7
Internal Precharge starting Timing
Asserted
Command
For Different Bank
3
4
5
6
7
8
9 10
READ
Legal Legal Legal Legal Legal Legal Legal Legal
READA
Legal Legal Legal Legal Legal Legal Legal Legal
WRITE(CL=2) Illegal Illegal Illegal Illegal Illegal Legal Legal Legal
WRITE(CL=2.5) Illegal Illegal Illegal Illegal Illegal Illegal Legal Legal
WRITEA(CL=2) Illegal Illegal Illegal Illegal Illegal Legal Legal Legal
WRITEA(CL=2.5) Illegal Illegal Illegal Illegal Illegal Illegal Legal Legal
ACT
Legal Legal Legal Legal Legal Legal Legal Legal
PCG
Legal Legal Legal Legal Legal Legal Legal Legal
Operating description when new command is asserted.
28

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