MACH131-5VI View Datasheet(PDF) - Lattice Semiconductor
Part Name
Description
Manufacturer
MACH131-5VI Datasheet PDF : 48 Pages
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PAL-Block
Asynchronous
Preset
Sum of Products
From Logic
IC Allocator
CLK0
CLKn
PAL-Block
Asynchronous
Reset
1
1
AP
0
D/T/L Q
0
AR
To
Switch
Matrix
Figure 5. Buried Macrocell (MACH 2 only)
From I/O Pin
14051K-030
From
Logic
n
Allocator
To Switch
Matrix
From Logic
Allocator
CLK0
CLKn
a. Combinatorial
n
AP
TQ
AR
To Switch
Matrix
c. T-type register
From
n
Logic
Allocator
CLK0
CLKn
To Switch
Matrix
AP
LQ
G
AR
e. Latch
From Logic
n
Allocator
CLKÂ0
CLÂKn
AP
DQ
AR
To Switch
Matrix
b. D-type register
From I/O
Cell
CLK0
CLKn
AP
DQ
AR
To Switch
Matrix
d. Input register
From I/O
Cell
CLK0
CLKn
AP
LQ
G
AR
To Switch
Matrix
f. Input latch
14051K-006
Figure 6. Buried Macrocell Configurations (MACH 2 only)
10
MACH 1 & 2 Families
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