SL20T0081 View Datasheet(PDF) - System Logic Semiconductor

Part Name

Description

Manufacturer

SL20T0081

81 COMMON x 132 SEGMENT STN LCD DRIVER / CONTROLLER

System Logic Semiconductor 

SLS System Logic Semiconductor

SL20T0081

System Interface pins

Pin Name

I/O

Function

RESET

D7 ~ D0

(SI)

(SCK)

RS

CE1

CE2

RD

(E)

WR

(R/W)

P68/80

I

Device Reset pin.

When RESET = 0, device initialization operation is executed.

8bit bi-directional data bus that should be connected to the standard MPU data bus.

When PS=0 the serial interface is enabled and pins are set as following.

D7

: Serial data input (SI)

I/O

D6

: Serial interface clock input (SCK)

D5 ~ D0 : high impedance state

When the chip does not be selected, D7 ~ D0 are set to high impedance.

Display data / Control data selection signal input pin

I

RS = 1 : D7 ~ D0 input are display data

RS = 0 : D7 ~ D0 input are control data

Chip Select signal input pins

I

When CE1 = 0 and CE2 = 1, then the chip select becomes active,

and data/command I/O is enabled.

• When the device connected to an 8080 MPU bus, this pin acts as “active LOW” read

signal input pin. If the device is selected and RD = 0, then SL20T0081 outputs the data

I

to data bus pins.

• When the device connected to a 6800 MPU bus, this pin acts as “active HIGH” R/W

enable signal input pin. If the device is selected and RD = 1, then SL20T0081 executes

read or write operation that controlled by WR signal.

• When the device connected to an 8080 MPU bus, this pin acts as “active LOW” write

signal input pin. If the device is selected and WR = 0, then SL20T0081 accepts the data

via data bus pins.

I

• When the device connected to a 6800 MPU bus, this pin acts as read/write control signal

input pin.

WR(R/W) = 1 : Read

WR(R/W) = 0 : Write

Bus type selection pin.

I

P68/80 = 1 : 6800 MPU bus type interface.

P68/80 = 0 : 8080 MPU bus type interface

Parallel data transfer / Serial data transfer mode selection pin.

PS = 1 : Parallel data transfer mode.

PS = 0 : Serial data transfer mode.

PS

I

PS Data transfer mode Read

Write

1 Parallel data transfer enabled enabled

0 Serial data transfer disabled enabled

Data bus

D7 ~D0

D7 (SI)

SCK pin

-

D6 (SCK)

When PS = 0, RD(E) and WR(R/W) pins are fixed to either 0 or 1.

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