PSB 7238
Electrical Specification
R/W
CS x DS
D0 - D7
t DSD
t RWD
t WW
t WI
t WD
t DW
Data
Figure 61 Microprocessor Write Timing
ITT09679
CS x DS
AD0 - AD7
t AS
t AH
ITT09662
Figure 62 Non-Multiplexed Address Timing
Table 25
Parameter
Symbol
ALE pulse width
Address setup time to ALE
Address hold time from ALE
Address latch setup time to WR, RD
Address setup time
Address hold time
ALE guard time
DS delay after R/W setup
R/W hold from CS × DS inactive
tAA
tAL
tLA
tALS
tAS
tAH
tAD
tDSD
tRWD
Limit Values Unit
min. max.
50 –
ns
15 –
ns
10 –
ns
0
–
ns
25 –
ns
10 –
ns
15 –
ns
0
–
ns
0
–
ns
Semiconductor Group
183
Data Sheet 1998-07-01