Philips Semiconductors
74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Table 8: Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 9.
Symbol Parameter
Tamb = −40 °C to +125 °C
tPHL, tPLH propagation delay CP to Qn
tPZH, tPZL 3-state output enable time OE to Qn
tPHZ, tPLZ 3-state output disable time OE to Qn
tTHL, tTLH output transition time
tW
CP clock pulse width HIGH or LOW
tsu
set-up time Dn to CP
th
hold time Dn to CP
fmax
maximum clock frequency
Conditions
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
9397 750 13814
Product data sheet
Rev. 03 — 11 November 2004
Min Typ Max Unit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
120 -
24
-
20
-
90
-
18
-
15
-
5
-
5
-
5
-
4.0 -
20
-
24
-
250 ns
50
ns
43
ns
210 ns
42
ns
36
ns
205 ns
41
ns
35
ns
90
ns
18
ns
15
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
MHz
-
MHz
-
MHz
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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