MCP3422/3/4
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all parameters apply for TA = -40°C to +85°C, VDD = +5.0V, VSS = 0V,
CHn+ = CHn- = VREF/2, VINCOM = VREF /2. All ppm units use 2*VREF as differential full scale range.
Parameters
Sym
Min
Typ
Max
Units
Conditions
PGA Gain Error Match (Note 6)
—
0.1
—
% Between any 2 PGA settings
Gain Error Drift (Note 6)
—
15
—
ppm/°C PGA=1, DR=3.75 SPS
Offset Error
VOS
—
15
55
µV Tested at PGA = 1
DR = 3.75 SPS
Offset Drift vs. Temperature
—
50
—
nV/°C
Common-Mode Rejection
—
105
—
dB at DC and PGA =1,
Gain vs. VDD
—
110
—
5
—
dB at DC and PGA =8, TA = +25°C
—
ppm/V TA = +25°C, VDD = 2.7V to 5.5V,
PGA = 1
Power Supply Rejection at DC
Input
—
100
—
dB TA = +25°C, VDD = 2.7V to 5.5V,
PGA = 1
Power Requirements
Voltage Range
Supply Current during
Conversion
VDD
2.7
—
IDDA
—
145
—
135
Supply Current during Standby
IDDS
—
0.3
Mode
I2C Digital Inputs and Digital Outputs
5.5
V
180
µA VDD = 5.0V
—
µA VDD = 3.0V
1
µA VDD = 5.0V
High level input voltage
VIH
0.7VDD
—
Low level input voltage
VIL
—
—
Low level output voltage
VOL
—
—
Hysteresis of Schmidt Trigger
VHYST 0.05VDD
—
for inputs (Note 7)
Supply Current when I2C bus
IDDB
—
—
line is active
VDD
0.3VDD
0.4
—
10
V at SDA and SCL pins
V at SDA and SCL pins
V
IOL = 3 mA
V
fSCL = 100 kHz
µA Device is in standby mode while
I2C bus is active
Input Leakage Current
IILH
—
—
IILL
-1
—
Logic Status of I2C Address Pins (Note 8)
1
µA VIH = 5.5V
—
µA VIL = GND
Adr0 and Adr1 Pins
Adr0 and Adr1 Pins
Adr0 and Adr1 Pins
Addr_Low VSS
—
Addr_High 0.75VDD
—
Addr_Float 0.35VDD
—
0.2VDD
VDD
0.6VDD
V The device reads logic low.
V The device reads logic high.
V Read pin voltage if voltage is
applied to the address pin.
(Note 9)
—
VDD/2
—
Pin Capacitance and I2C Bus Capacitance
Device outputs float output
voltage (VDD/2) on the address
pin, if left “floating”. (Note 10)
Pin capacitance
I2C Bus Capacitance
CPIN
—
4
Cb
—
—
10
pF
400
pF
Note 1: Any input voltage below or greater than this voltage causes leakage current through the ESD diodes at the input pins.
This parameter is ensured by characterization and not 100% tested.
2: This input impedance is due to 3.2 pF internal input sampling capacitor.
3: This parameter is ensured by design and not 100% tested.
4: The total conversion speed includes auto-calibration of offset and gain.
5: INL is the difference between the endpoints line and the measured code at the center of the quantization band.
6: Includes all errors from on-board PGA and VREF.
7: This parameter is ensured by characterization and not 100% tested.
8: MCP3423 and MCP3424 only.
9: Addr_Float voltage is applied at address pin.
10: No voltage is applied at address pin (left “floating”).
DS22088C-page 6
© 2009 Microchip Technology Inc.