ADIS16367BMLZ View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADIS16367BMLZ

Six Degrees of Freedom Inertial Sensor

Analog Devices 

ADIS16367

Data Sheet

Parameter

Test Conditions/Comments

Min

Typ

Max Unit

DAC OUTPUT

5 kΩ/100 pF to GND

Resolution

12

Bits

Relative Accuracy

101 LSB ≤ input code ≤ 4095 LSB

±4

LSB

Differential Nonlinearity

±1

LSB

Offset Error

±5

mV

Gain Error

±0.5

%

Output Range

0

3.3

V

Output Impedance

2

Ω

Output Settling Time

10

µs

LOGIC INPUTS1

Input High Voltage, VIH

Input Low Voltage, VIL

CS Wake-Up Pulse Width

Logic 1 Input Current, IIH

E Logic 0 Input Current, IIL

All Pins Except RST

RST Pin

T Input Capacitance, CIN

DIGITAL OUTPUTS1

Output High Voltage, VOH

E Output Low Voltage, VOL

FLASH MEMORY

Data Retention3

FUNCTIONAL TIMES4

L Power-On, Start-Up Time

Reset Recovery Time

O Sleep Mode Recovery Time

Flash Memory Test Time

S Automatic Self-Test Time

CONVERSION RATE

Clock Accuracy

B Sync Input Clock5

POWER SUPPLY

O Power Supply Current

CS signal to wake up from sleep mode

VIH = 3.3 V

VIL = 0 V

ISOURCE = 1.6 mA

ISINK = 1.6 mA

Endurance2

TJ = 85°C

Time until data is available

Normal mode, SMPL_PRD ≤ 0x09

Low power mode, SMPL_PRD ≥ 0x0A

Normal mode, SMPL_PRD ≤ 0x09

Low power mode, SMPL_PRD ≥ 0x0A

Normal mode, SMPL_PRD ≤ 0x09

Low power mode, SMPL_PRD ≥ 0x0A

Normal mode, SMPL_PRD ≤ 0x09

Low power mode, SMPL_PRD ≥ 0x0A

SMPL_PRD = 0x0001

SMPL_PRD = 0x0001 to 0x00FF

Operating voltage range, VCC

Low power mode

Normal mode

2.0

20

±0.2

40

1

10

2.4

10,000

20

180

250

60

130

4

9

17

90

12

0.413

0.8

4.75

5.0

24

49

V

0.8

V

0.55 V

µs

±10 µA

60

µA

mA

pF

V

0.4

V

Cycles

Years

ms

ms

ms

ms

ms

ms

ms

ms

ms

819.2 SPS

±3

%

1.2

kHz

5.25 V

mA

mA

Sleep mode

500

µA

1 The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant.

2 Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C.

3 The data retention lifetime equivalent is at a junction temperature (TJ) of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with junction

temperature.

4 These times do not include thermal settling and internal filter response times (330 Hz bandwidth), which may affect overall accuracy.

5 The sync input clock functions below the specified minimum value, at reduced performance levels.

Rev. B | Page 4 of 20

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