74LVC2G17GN(2013) View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
74LVC2G17GN Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVC2G17
Dual non-inverting Schmitt trigger with 5 V tolerant input
1A
1Y
2A
Fig 3. Logic diagram
7. Pinning information
7.1 Pinning
2Y
mnb068
74LVC2G17
1A 1
6 1Y
GND 2
5 VCC
2A 3
4 2Y
001aaf078
Fig 4. Pin configuration SOT363
and SOT457
74LVC2G17
1A 1
6 1Y
GND 2
5 VCC
2A 3
4 2Y
001aaf079
Transparent top view
Fig 5. Pin configuration SOT886
74LVC2G17
1A 1
6 1Y
GND 2
5 VCC
2A 3
4 2Y
001aaf080
Transparent top view
Fig 6. Pin configuration SOT891,
SOT1115 and SOT1202
7.2 Pin description
Table 3.
Symbol
1A
GND
2A
2Y
VCC
1Y
Pin description
Pin
1
2
3
4
5
6
Description
data input
ground (0 V)
data input
data output
supply voltage
data output
8. Functional description
Table 4.
Input
nA
L
H
Function table[1]
Output
nY
L
H
[1] H = HIGH voltage level; L = LOW voltage level.
74LVC2G17
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 2 May 2013
© NXP B.V. 2013. All rights reserved.
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