NXP Semiconductors
TDA9885; TDA9886
I2C-bus controlled multistandard alignment-free IF-PLL demodulators
I Four selectable I2C-bus addresses
I I2C-bus control for all functions
I I2C-bus transceiver with pin programmable Module ADdress (MAD)
3. Applications
I TV, VTR, PC, and STB applications
4. Quick reference data
Table 1. Quick reference data
Symbol Parameter
VP
supply voltage
IP
supply current
τP
time constant (R × C) for
network at pin VP
Video part
Vi(VIF)(rms) VIF input voltage
sensitivity (RMS value)
GVIF(cr)
fVIF
control range VIF gain
vision carrier operating
frequencies
∆fVIF
Vo(v)(p-p)
VIF frequency window of
digital acquisition help
video output voltage
(peak-to-peak value)
Gdif
differential gain
ϕdif
Bv(−1dB)
differential phase
−1 dB video bandwidth
Bv(−3dB)(trap) −3 dB video bandwidth
including sound carrier
trap
αSC1
attenuation at first sound
carrier
Conditions
for applications without I2C-bus
−1 dB video at output
see Figure 9
see Table 13
related to fVIF; see Figure 12
see Figure 7
normal mode (sound carrier trap active)
and sound carrier on
trap bypass mode and sound carrier off
“ITU-T J.63 line 330”
B/G standard
L standard
“ITU-T J.63 line 330”
trap bypass mode and sound carrier off;
AC load: CL < 20 pF, RL > 1 kΩ
ftrap = 4.5 MHz
ftrap = 5.5 MHz
ftrap = 6.0 MHz
ftrap = 6.5 MHz
f = 4.5 MHz
f = 5.5 MHz
Min
[1] 4.5
52
1.2
-
60
-
-
-
-
-
-
-
1.7
[2] 0.95
[3]
-
-
-
[2] 5
[4] 3.95
[4] 4.90
[4] 5.40
[4] 5.50
30
30
Typ Max
5.0 5.5
63
70
-
-
60
100
66
-
33.4 -
33.9 -
38.0 -
38.9 -
45.75 -
58.75 -
±2.3 -
2.0 2.3
1.10 1.25
-
5
-
7
2
4
6
-
4.05 -
5.00 -
5.50 -
5.95 -
36
-
36
-
Unit
V
mA
µs
µV
dB
MHz
MHz
MHz
MHz
MHz
MHz
MHz
V
V
%
%
deg
MHz
MHz
MHz
MHz
MHz
dB
dB
TDA9885_TDA9886_3
Product data sheet
Rev. 03 — 16 December 2008
© NXP B.V. 2008. All rights reserved.
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