CD40108BMS View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
CD40108BMS Datasheet PDF : 11 Pages
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CD40108BMS
December 1992
CMOS 4 x 4 Multiport Register
Features
Description
• High Voltage Type (20V Rating)
• Four 4-Bit Registers
• One Input and Two Output Buses
• Unlimited Expansion in Bit and Word Directions
• Data Lines have latched Inputs
• 3-State Outputs
• Separate Control of Each Bus, Allowing Simultaneous
Independent Reading of Any of Four Registers on Bus
A and Bus B and Independent Writing Into Any of the
Four Registers
• CD40108BMS is Pin-Compatible with Industry Type
MC14580
• Standardized Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
The CD40108BMS is a 4 x 4 multiport register containing
four 4-bit registers, write address decoder, two separate
read address decoders, and two 3-state output buses.
When the ENABLE input is low, the corresponding output
bus is switched, independently of the clock, to a high-imped-
ance state. The high-impedance third state provides the out-
puts with the capability of being connected to the bus lines in
a bus-organized system without the need for interface or
pull-up components.
When the WRITE ENABLE input is high, all data input lines
are latched on the positive transition of the CLOCK and the
data is entered into the word selected by the write address
lines. When WRITE ENABLE is low, the CLOCK is inhibited
and no new data is entered. In either case, the contents of
any word may be accessed via the read address lines inde-
pendent of the state of the CLOCK input.
The CD40108BMS is supplied in these 24-lead outline pack-
ages:
Braze Seal DIP
H4V
Ceramic Flatpack H4P
Applications
• Scratch-Pad Memories
• Arithmetic Units
• Data Storage
Pinout
CD40108BMS
TOP VIEW
Q3 B 1
Q2 B 2
3-STATE A 3
Q0 A 4
Q1 A 5
Q2 A 6
Q3 A 7
WRITE 0 8
WRITE 1 9
READ 1B 10
READ 0B 11
VSS 12
24 VDD
23 Q1 B
22 Q0 B
21 3-STATE B
20 D0
19 D1
18 D2
17 D3
16 CLOCK
15 WRITE ENABLE
14 READ 1A
13 READ 0A
Functional Diagram
WRITE
ENABLE 15
DATA
INPUTS
D0 20
D1 19
D2 18
D3 17
3-STATE A
3
4 Q0
5 Q1
6 Q2
7 Q3
WORD A
OUTPUT
WRITE 0 8
WRITE 1 9
READ 1A 14
READ 0A 13
VDD = 24
VSS = 12
READ 1B 10
READ 0B 11
16
CLOCK
22
Q0
23 Q1
2 Q2
1 Q3
WORD B
OUTPUT
21
3-STATE B
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-25
File Number 3356
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